The HMC6832 is an input selectable, 2:8 differential fanoutbuffer designed for low noise clock distribution. The IN_SELcontrol pin selects one of the two differential inputs. This inputis then buffered to all eight differential outputs. The low jitteroutputs of the HMC6832 lead to synchronized low noiseswitching of downstream circuits, such as mixers, analog-todigitalconverters (ADCs)/digital-to-analog converters (DACs),or serializer/deserializer (SERDES) devices. The device is capableof low voltage, positive emitter-coupled logic (LVPECL) or lowvoltage differential signaling (LVDS) configurations by pullingthe CONFIG pin low for LVPECL or high or open (internallypulled high) for pseudo LVDS.Product Highlights Multiple Output Configurations. The CONFIG pin allows the user to select LVPECL or LVDS output termination. Multiple Supply Voltage Operation. The HMC6832 operates at 2.5 V or 3.3 V for LVPECL terminations (2.5 V only for LVDS). Low Noise. The HMC6832 noise is low, typically from ?168 dBc/Hz to ?162 dBc/Hz up to 3000 MHz. Low Propagation Delay. The HMC6832 displays a low delay, less than 207 ps, typical. Channel skew is also low, ?5 ps, typical. Low Core Current. The HMC6832 has a low core current of 56 mA, typical. Applications SONET, Fibre Channel, GigE clock distribution ADC/DAC clock distribution Low skew and jitter clocks Wireless/wired communications Level translation High performance instrumentation Medical imaging Single-ended to differential conversions

The HMC788A is a 0.01 GHz to 10 GHz, gain block, monolithic microwave integrated circuit (MMIC) amplifier using gallium arsenide (GaAs), pseudomorphic high electron mobility transistor (pHEMT) technology.This 2 mm ? 2 mm LFCSP amplifier can be used as either a cascadable 50 ? gain stage, or to drive the local oscillator (LO) port of many of the single and double balanced mixers from Analog Devices, Inc. with up to 20 dBm output power.The HMC788A offers 14 dB of gain and an output IP3 of 33 dBm while requiring only 76 mA from a 5 V supply.The Darlington feedback pair exhibits reduced sensitivity to normal process variations and yields excellent gain stability over temperature while requiring a minimal number of external bias components.Applications Cellular, 3G, LTE, WiMAX, and 4G LO driver applications Microwave radio Test and measurement equipment Ultra wideband (UWB) communications

The HMC7912 is a compact, gallium arsenide (GaAs), pseudomorphic(pHEMT), monolithic microwave integrated circuit(MMIC) upconverter in a RoHS compliant, low stress, injectionmolded plastic LFCSP package that operates from 21 GHz to24 GHz. This device provides a small signal conversion gain of15 dB with 22 dBc of sideband rejection. The HMC7912 uses avariable gain amplifier preceded by an in-phase/quadrature (I/Q)mixer that is driven by an active 2? LO multiplier. IF1 and IF2mixer inputs are provided, and an external 90? hybrid is needed toselect the required sideband. The I/Q mixer topology reducesthe need for filtering of the unwanted sideband. The HMC7912is a much smaller alternative to hybrid style single sideband (SSB)upconverter assemblies, and it eliminates the need for wirebonding by allowing the use of surface-mount manufacturingtechniques.Applications Point to point and point to multipoint radios Military radars, electronic warfare (EW), and electronic intelligence (ELINT) Satellite communications Sensors

The HMC8412 is a gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), pseudomorphic high electron mobility transistor (pHEMT), low noise wideband amplifier that operates from 0.4 GHz to 11 GHz. The HMC8412 provides a typical gain of 15.5 dB, a 1.4 dB typical noise figure, and a typical output third-order intercept (OIP3) of ?33 dBm, requiring only 60 mA from a 5 V drain supply voltage. The saturated output power (PSAT) of ?20.5 dBm typical enables the low noise amplifier (LNA) to function as a local oscillator (LO) driver for many Analog Devices, Inc., balanced, inphase and quadrature (I/Q) or image rejection mixers. The HMC8412 also features inputs and outputs that are internally matched to 50 ?, making the device ideal for surface-mount technology (SMT)-based, high capacity microwave radio applications. The HMC8412 is housed in an RoHS-compliant, 2 mm ? 2 mm, 6-lead LFCSP.APPLICATIONS Test instrumentation Telecommunications Military radar and communication Electronic warfare Aerospace

The ADF4401A is a fully integrated, system in package (SiP) translation loop (also known as an offset loop) module that includes a voltage controlled oscillator (VCO) and calibration phase-locked loop (PLL) circuit. Designed for highly jitter sensitive applications, this solution reduces board space and complexity compared to traditional discrete translation loop solutions designed on a printed circuit board (PCB). The time to market is significantly reduced by taking advantage of this highly integrated solution with in package circuitry and enhanced isolation that attenuates spurious components. The ADF4401A provides a frequency synthesis solution for engineers designing highly competitive systems. The ADF4401A requires an external phase detector or phase frequency detector (PFD) and an external local oscillator (LO) to form a frequency synthesis solution. The ADF4401A implements an integrated downconversion mixing stage in the feedback loop that sets the loop gain to 1 and minimizes the in band phase noise. By combining the frequency downconversion stage and low noise, integrated, wideband, VCO technology from Analog Devices, Inc., the ADF4401A offers a wideband jitter performance of 9 fs rms at 8 GHz output. The output jitter performance is largely dependent on the performance of the external offset LO. The ADF4401A module uses an internal PFD and VCO calibration circuitry to select the appropriate VCO band. The user can disable the calibration circuitry and close the loop using the external PFD. All on-chip registers are controlled via a serial port interface (SPI). APPLICATIONSInstrumentation and measurement Automated test equipment Aerospace and defense

The ADF5901 is a 24 GHz Tx monolithic microwave integrated circuit (MMIC) with an on-chip, 24 GHz VCO with PGA and dual Tx channels for radar systems. The on-chip, 24 GHz VCO generates the 24 GHz signal for the two Tx channels and the LO output. Each Tx channel contains a power control circuit. There is also an on-chip temperature sensor.Control of all the on-chip registers is through a simple 4-wire interface.The ADF5901 comes in a compact 32-lead, 5 mm ? 5 mm LFCSP package.Applications Automotive radars Industrial radars Microwave radar sensors Industrial sensors Precision instrumentation Tank level sensors Smart sensors Door opening Energy saving Commercial sensors: object detection and tracking Cars, boats, aircraft, and UAVs (drones): collision avoidance Intelligent transportation systems: intelligent traffic monitoring and control Surveillance and security

The ADuCM320 is a fully integrated single package device that incorporates high performance analog peripherals together with digital peripherals controlled by an 80 MHz ARM Cortex-M3 processor and integral flash for code and data.The ADC on the ADuCM320 provides 14-bit, 1 MSPS data acquisition on up to 16 input pins that can be programmed for single-ended or differential operation. The voltage at the IDAC output pins can also be measured by the ADC, which is useful for controlling the power consumption of the current DACs. Additionally, chip temperature and supply voltages can be measured.The ADC input voltage is 0 V to VREF. A sequencer is provided, which allows a user to select a set of ADC channels to be measured in sequence without software involvement during the sequence. The sequence can optionally repeat automatically at a user selectable rate.Up to eight VDACs are provided with output ranges that are programmable to one of two voltage ranges.Four IDAC sources are provided. The output currents are programmable with ranges of 0 mA to 150 mA. A low drift band gap reference and voltage comparator completes the analog input peripheral set.The ADuCM320 can be configured so that the digital and analog outputs will retain their output voltages and currents through a watchdog or software reset sequence. Thus, a product can remain functional even while the ADuCM320 is resetting itself.The ADuCM320 has a low power ARM Cortex-M3 processor and a 32-bit RISC machine that offers up to 100 MIPS peak performance. Also integrated on chip are 2 ? 128 kB Flash/EE memory and 32 kB of SRAM. The flash comprises two separate 128 kB blocks supporting execution from one flash block and simultaneous writing/erasing of the other flash block.The ADuCM320 operates from an on-chip oscillator or a 16 MHz external crystal and a PLL at 80 MHz. This clock can optionally be divided down to reduce current consumption. Additional low power modes can be set via software. In normal operating mode, the ADuCM320 digital core consumes about 300 ?A per MHz.The device includes an MDIO interface capable of operating at up to 4 MHz. The capability to simultaneously execute from one flash block and write/erase the other flash block makes the ADuCM320 ideal for 10G, 40G, and 100G optical applications. User programming is eased by incorporating PHYADR and DEVADD hardware comparators. In addition, the nonerasable kernel code plus flags in user flash provide assistance by allowing user code to robustly switch between the two blocks of user flash code and data spaces.The ADuCM320 integrates a range of on-chip peripherals that can be configured under software control, as required in the appli-cation. These peripherals include 1 ? UART, 2 ? I2C, and 2 ? SPI serial input/output communication controllers, GPIO, 32-element programmable logic array, 3 general-purpose timers, plus a wake-up timer and system watchdog timer. A 16-bit PWM with seven output channels is also provided.GPIO pins on the device power up in high impedance input mode. In output mode, the software chooses between open-drain mode and push-pull mode. The pull-up resistors can be disabled and enabled in software. In GPIO output mode, the inputs can remain enabled to monitor the pins. The GPIO pins can also be programmed to handle digital or analog peripheral signals, in which case the pin characteristics are matched to the specific requirement.A large support ecosystem is available for the ARM Cortex-M3 processor to ease product development of the ADuCM320. Access is via the ARM serial wire debug port (SW-DP). On-chip factory firmware supports in-circuit serial download via MDIO. These features are incorporated into a low cost QuickStart development system supporting this precision analog microcontroller family. APPLICATIONS Optical networking

The AD4030-24 is a 2 MSPS successive approximation register (SAR) analog-to-digital converter (ADC) with Easy Drive?. With a guaranteed maximum ?0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24 achieves unparalleled precision from ?40?C to +125?C. Figure 1 in the data sheet shows the functional architecture of the AD4030-24.A low-drift, internal precision reference buffer eases voltage reference sharing with other system circuitry. The AD4030-24 offers a typical dynamic range of 109 dB when using a 5 V reference. The low noise floor enables signal chains requiring less gain and lower power. A block averaging filter with programmable decimation ratio can increase dynamic range up to 155.5 dB. The wide differential input and common mode ranges allow inputs to use the full ?VREF range without saturating, simplifying signal conditioning requirements and system calibration. The improved settling of the Easy Drive analog inputs broadens the selection of analog front-end components compatible with the AD4030-24. Both single-ended and differential signals are supported.The versatile Flexi-SPI serial peripheral interface (SPI) eases host processor and ADC integration. A wide data clocking window, multiple SDO lanes, and optional DDR data clocking can reduce the serial clock to 10 MHz while operating at a sample rate of 2 MSPS. Echo clock mode and ADC host clock mode relax the timing requirements and simplify the use of digital isolators.The BGA package of the AD4030-24 integrates all critical power supply and reference bypass capacitors, reducing the footprint and system component count, and lessening sensitivity to board layout.APPLICATIONS Automatic test equipment Digital control loops Medical instrumentation Seismology Semiconductor manufacturing Scientific instrumentation

The AD4112 is a low power, low noise, 24-bit, sigma-delta (?-?) analog-to-digital converter (ADC) that integrates an analog front end (AFE) for fully differential or single-ended, high impedance (?1 M?) bipolar, ?10 V voltage inputs, and 0 mA to 20 mA current inputs.The AD4112 also integrates key analog and digital signal conditioning blocks to configure eight individual setups for each analog input channel in use. The AD4112 features a maximum channel scan rate of 6.21 kSPS (161 ?s) for fully settled data.The embedded 2.5 V, low drift (5 ppm/?C), band gap internal reference (with output reference buffer) reduces the external component count.The digital filter allows flexible settings, including simultaneous 50 Hz and 60 Hz rejection at a 27.27 SPS output data rate. The user can select between the different filter settings depending on the demands of each channel in the application. The automatic channel sequencer enables the ADC to switch through each enabled channel.The precision performance of the AD4112 is achieved by integrating the proprietary iPassives? technology from Analog Devices, Inc. The AD4112 is factory calibrated to achieve a high degree of specified accuracy.The AD4112 operates with a single power supply, making it easy to use in galvanically isolated applications. The specified operating temperature range is ?40?C to +105?C. The AD4112 is housed in a 40-lead, 6 mm ? 6 mm LFCSP package.APPLICATIONS Process control PLC and DCS modules Instrumentation and measurement

The AD5243 and AD5248 provide a compact 3 mm ? 4.9 mmpackaged solution for dual, 256-position adjustment applications.The AD5243 performs the same electronic adjustment functionas a 3-terminal mechanical potentiometer, and the AD5248performs the same adjustment function as a 2-terminal variableresistor. Available in four end-to-end resistance values (2.5 k?,10 k?, 50 k?, and 100 k?), these low temperature coefficientdevices are ideal for high accuracy and stability-variableresistance adjustments. The wiper settings are controllablethrough the I2C-compatible digital interface. The AD5248 hasextra package address decode pins, AD0 and AD1, allowingmultiple parts to share the same I2C, 2-wire bus on a PCB. Theresistance between the wiper and either endpoint of the fixedresistor varies linearly with respect to the digital code transferred into the RDAC latch. (The terms digital potentiometer, VR,and RDAC are used interchangeably.)Operating from a 2.7 V to 5.5 V power supply and consumingless than 6 ?A allows the AD5243/AD5248 to be used inportable battery-operated applications.For applications that program the AD5243/AD5248 at thefactory, Analog Devices, Inc., offers device programmingsoftware running on Windows? NT/2000/XP operating systems.This software effectively replaces the need for external I2Ccontrollers, which in turn enhances the time to market ofsystems. An AD5243/AD5248 evaluation kit and software areavailable. The kit includes a cable and instruction manual.Applications Systems calibrations Electronics level settings Mechanical trimmers replacement in new designs Permanent factory printed circuit board (PCB) setting Transducer adjustment of pressure, temperature, position, chemical, and optical sensors RF amplifier biasing Gain control and offset adjustment