Ethernet Development Tools Eval - 10/100 PHY w/EEE & WOL, 0.11u

Ethernet Development Tools 10/100 PHY, 0.11u - Evaluation Board

Ethernet Development Tools Eval - 10/100 PHY w/EEE & WOL, 0.11u

Power Management IC Development Tools MADK EVAL Board with CIPOS Maxi

Evaluation Board For DAC Converter Type, 8Bit Resolution, Dual DAC, Parallel Digital Interfaces

The ADG901/ADG902 are wideband switches that use a complementary metal-oxide semiconductor (CMOS) process to provide high isolation and low insertion loss to 1 GHz. The ADG901 is an absorptive (matched) switch with 50 ? terminated shunt legs, while the ADG902 is a reflective switch. These devices are designed such that the isolation is high over the dc to 1 GHz frequency range. These switches enable the user to pass dc signals up to 0.5 V without the use of a dc blocking capacitor. They have on-board CMOS control logic, thus eliminating the need for external controlling circuitry. The control inputs are both CMOS and LVTTL compatible. The low power consumption of these CMOS devices makes them ideally suited to wireless applications and general-purpose high frequency switching.Product Highlights 40 dB Off Isolation at 1 GHz 0.8 dB Insertion Loss at 1 GHz 17 dBm P1dB at 1 GHzApplications Wireless communications General purpose RF switching Dual-band applications High speed filter selection Digital transceiver front-end switch IF switching Tuner modules Antenna diversity switching list

L638x Half H-Bridge Driver Power Management Evaluation Board

The ADL5306 is a low cost micro-miniature logarithmic converter optimized for the determination of optical power in fiber-optic systems. It uses an advanced implementation of a classic translinear (junction-based) technique to provide a large dynamic range in a versatile and easily-used form. A single supply voltage of between 3 V and 5.5 V is adequate; dual supplies may optionally be used. The low quiescent current (typically 5 mA) permits use in battery-operating applicationsThe input current IPD of 100 nA to 100 ?A applied to the INPT pin is the collector current of an optimally-scaled NPN transistor, which converts this current to a voltage (its VBE) with a precise logarithmic relationship. A second such converter is used to handle the reference current, IREF, applied to pin IREF. These input nodes are biased slightly above ground (0.5 V). This is generally acceptable for photodiode applications where the anode does not need to be grounded. Similarly, this bias voltage is easily accounted for in generating IREF. The output of the logarithmic front-end is available at pin VLOG.