The HMC967LP4E is a compact GaAs MMIC I/Q downconverter in a leadless RoHS compliant SM T package. This device provides a small signal conversion gain of 15 dB with a noise figure of 2.5 dB and 25 dBc of image rejection across the frequency band. The HMC967LP4E utilizes an LNA followed by an image reject mixer which is driven by an active x2 multiplier. The image reject mixer eliminates the need for a filter following the LNA, and removes thermal noise at the image frequency. I and Q mixer outputs are provided and an external 90? hybrid is needed to select the required sideband. The HMC967LP4E is a much smaller alternative to hybrid style image reject mixer downconverter assemblies, and is compatible with surface mount manufacturing techniques.Applications Point-to-Point &?Point-to-Multi-Point Radio Military Radar, EW & ELINT Satellite Communications

The AD1836A is a high performance, single-chip codec that provides three stereo DACs and two stereo ADCs using ADI?s patented multibit ?-? architecture. An SPI? port is included, allowing a microcontroller to adjust volume and many other parameters. The AD1836A operates from a 5 V supply, with provision for a separate output supply to interface with low voltage external circuitry. The AD1836A is available in a 52-lead MQFP (PQFP) package.APPLICATIONS Home theater systems Automotive audio systems DVD recorders Set-top boxes Digital audio effects processors

The AD603 is a low noise, voltage-controlled amplifier for use in RF and IF AGC systems. It provides accurate, pin-selectable gains of ?11 dB to +31 dB with a bandwidth of 90 MHz or +9 dB to 51+ dB with a bandwidth of 9 MHz. Any intermediate gain range may be arranged using one external resistor. The input referred noise spectral density is only 1.3 nV/?Hz, and power consumption is 125 mW at the recommended ?5 V supplies.The decibel gain is linear in dB, accurately calibrated, and stable over temperature and supply. The gain is controlled at a high impedance (50 M?), low bias (200 nA) differential input; the scaling is 25 mV/dB, requiring a gain control voltage of only 1 V to span the central 40 dB of the gain range. An overrange and underrange of 1 dB is provided whatever the selected range. The gain control response time is less than 1 ?s for a 40 dB change.The differential gain control interface allows the use of either differential or single-ended positive or negative control voltages. Several of these amplifiers may be cascaded and their gain control gains offset to optimize the system SNR.The AD603 can drive a load impedance as low as 100 ? with low distortion. For a 500 ? load in shunt with 5 pF, the total harmonic distortion for a ?1 V sinusoidal output at 10 MHz is typically ?60 dBc. The peak specified output is ?2.5 V minimum into a 500 ? load.The AD603 uses a patented proprietary circuit topology?the X-AMP?. The X-AMP comprises a variable attenuator of 0 dB to ?42.14 dB followed by a fixed-gain amplifier. Because of the attenuator, the amplifier never has to cope with large inputs and can use negative feedback to define its (fixed) gain and dynamic performance. The attenuator has an input resistance of 100 ?, laser trimmed to ?3%, and comprises a 7-stage R-2R ladder network, resulting in an attenuation between tap points of 6.021 dB. A proprietary interpolation technique provides a continuous gain control function that is linear in dB.The AD603 is specified for operation from ?40?C to +85?C.Applications RF/IF AGC amplifiers Video gain controls A/D range extensions Signal measurements

The AD6641 is a 250 MHz bandwidth digital predistortion (DPD) observation receiver that integrates a 12-bit 500 MSPS ADC, a 16k ? 12 FIFO, and a multimode back end that allows users to retrieve the data through a serial port (SPORT), the SPI interface, a 12-bit parallel CMOS port, or a 6-bit DDR LVDS port after being stored in the integrated FIFO memory. It is optimized for outstanding dynamic performance and low power consumption and is suitable for use in telecommunications applications such as a digital predistortion observation path where wider bandwidths are desired. All necessary functions, including the sample-and-hold and voltage reference, are included on the chip to provide a complete signal conversion solution.The on-chip FIFO allows small snapshots of time to be captured via the ADC and read back at a lower rate. This reduces the constraints of signal processing by transferring the captured data at an arbitrary time and at a much lower sample rate. The FIFO can be operated in several user-programmable modes. In the single capture mode, the ADC data is captured when signaled via the SPI port or the use of the external FILL? pins. In the continuous capture mode, the data is loaded continuously into the FIFO and the FILL? pins are used to stop this operation.The data stored in the FIFO can be read back based on several user-selectable output modes. The DUMP pin can be asserted to output the FIFO data. The data stored in the FIFO can be accessed via a SPORT, SPI, 12-bit parallel CMOS port, or 6-bit DDR LVDS interface. The maximum output throughput supported by the AD6641 is in the 12-bit CMOS or 6-bit DDR LVDS mode and is internally limited to 1/8th of the maximum input sample rate. This corresponds to the maximum output data rate of 62.5 MHz at an input clock rate of 500 MSPS.The ADC requires a 1.9 V analog voltage supply and a differential clock for full performance operation. Output format options include twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing. Fabricated on an advanced SiGe BiCMOS process, the device is available in a 56-lead LFCSP and is specified over the industrial temperature range (?40?C to +85?C). This product is protected by a U.S. patent.APPLICATIONS Wireless and wired broadband communications Communications test equipment Power amplifier linearizationPRODUCT HIGHLIGHTS High Performance ADC Core. Maintains 65.8 dBFS SNR at 500 MSPS with a 250 MHz input. Low Power. Consumes only 695 mW at 500 MSPS. Ease of Use. On-chip 16k FIFO allows the user to target the high performance ADC to the time period of interest and reduce the constraints of processing the data by transferring it at an arbitrary time and a lower sample rate. The on-chip reference and sample-and-hold provide flexibility in system design. Use of a single 1.9 V supply simplifies system power supply design. Serial Port Control. Standard serial port interface supports configuration of the device and customization for the user?s needs. 1.9 V or 3.3 V SPI and Serial Data Port Operation.

The AD6684 is a 135 MHz bandwidth, quad intermediate frequency (IF) receiver. It consists of four 14-bit, 500 MSPS ADCs and various digital processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed to support communications applications. The analog full power bandwidth of the device is 1.4 GHz.?The quad ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. The AD6684 is optimized for wide input bandwidth, excellent linearity, and low power in a small package.?The analog inputs and clock signal input are differential. Each pair of ADC data outputs are internally connected to two DDCs through a crossbar mux. Each DDC consists of up to five cascaded signal processing stages: a 48-bit frequency translator, NCO, and up to four half-band decimation filters.?Each ADC output is connected internally to an NSR block. The integrated NSR circuitry allows improved SNR performance in a smaller frequency band within the Nyquist bandwidth. The device supports two different output modes selectable via the serial port interface (SPI). With the NSR feature enabled, the outputs of the ADCs are processed such that the AD6684 supports enhanced SNR performance within a limited portion of the Nyquist bandwidth while maintaining a 9-bit output resolution.?Each ADC output is also connected internally to a VDR block. This optional mode allows full dynamic range for defined input signals. Inputs that are within a defined mask (based on DPD applications) are passed unaltered. Inputs that violate this defined mask result in the reduction of the output resolution.?With VDR, the dynamic range of the observation receiver is determined by a defined input frequency mask. For signals falling within the mask, the outputs are presented at the maximum resolution allowed. For signals exceeding defined power levels within this frequency mask, the output resolution is truncated. This mask is based on DPD applications andsupports tunable real IF sampling, and zero IF or complex IF receive architectures.?Operation of the AD6684 in the DDC, NSR, and VDR modes is selectable via SPI-programmable profiles (the default mode is NSR at startup).In addition to the DDC blocks, the AD6684 has several functions that simplify the AGC function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input.?Users can configure each pair of IF receiver outputs onto either one or two lanes of Subclass 1 JESD204B-based high speed serialized outputs, depending on the decimation ratio and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF?, SYNCINB?AB, and SYNCINB?CD input pins.?The AD6684 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using the 1.8 V capable, 3-wire SPI.?The AD6684 is available in a Pb-free, 72-lead LFCSP and is specified over the ?40?C to +105?C junction temperature range. Product Highlights Low power consumption per channel. JESD204B lane rate support up to 15 Gbps. Wide full power bandwidth supports IF sampling of signals up to 1.4 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and NCO blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management.Applications Communications Diversity multiband, multimode digital receivers?3G/4G, W-CDMA, GSM, LTE, LTE-A HFC digital reverse path receivers Digital predistortion observation paths General-purpose software radios

The AD725 is a very low cost general purpose RGB to NTSC/PAL encoder that converts red, green and blue color componentsignals into their corresponding luminance (basebandamplitude) and chrominance (subcarrier amplitude and phase)signals in accordance with either NTSC or PAL standards.These two outputs are also combined on-chip to provide acomposite video output. All three outputs are available separatelyat voltages of twice the standard signal levels as requiredfor driving 75 ?, reverse-terminated cables.An evaluation board is available for this product and may be ordered using the following product number: AD725-EB.

The AD736 is a low power, precision, monolithic true rms-to-dc converter. It is laser trimmed to provide a maximum error of ?0.3 mV ? 0.3% of reading with sine wave inputs. Furthermore, it maintains high accuracy while measuring a wide range of input waveforms, including variable duty-cycle pulses and triac (phase)-controlled sine waves. The low cost and small size of this converter make it suitable for upgrading the performance of non-rms precision rectifiers in many applications. Compared to these circuits, the AD736 offers higher accuracy at an equal or lower cost.The AD736 can compute the rms value of both ac and dc input voltages. It can also be operated as an ac-coupled device by adding one external capacitor. In this mode, the AD736 can resolve input signal levels of 100 ?V rms or less, despite variations in temperature or supply voltage. High accuracy is also maintained for input waveforms with crest factors of 1 to 3. In addition, crest factors as high as 5 can be measured (introducing only 2.5% additional error) at the 200 mV full-scale input level.The AD736 has its own output buffer amplifier, thereby pro-viding a great deal of design flexibility. Requiring only 200 ?A of power supply current, the AD736 is optimized for use in portable multimeters and other battery-powered applications.The AD736 allows the choice of two signal input terminals: a high impedance FET input (1012 ?) that directly interfaces with High-Z input attenuators and a low impedance input (8 k?) that allows the measurement of 300 mV input levels while operating from the minimum power supply voltage of +2.8 V, ?3.2 V. The two inputs can be used either single ended or differentially.The AD736 has a 1% reading error bandwidth that exceeds 10 kHz for the input amplitudes from 20 mV rms to 200 mV rms while consuming only 1 mW.The AD736 is available in four performance grades. The AD736J and AD736K grades are rated over the 0?C to +70?C and ?20?C to +85?C commercial temperature ranges. The AD736A and AD736B grades are rated over the ?40?C to +85?C industrial temperature range. The AD736 is available in three low cost, 8-lead packages: PDIP, SOIC, and CERDIP.PRODUCT HIGHLIGHTS The AD736 is capable of computing the average rectified value, absolute value, or true rms value of various input signals. Only one external component, an averaging capacitor, is required for the AD736 to perform true rms measurement. The low power consumption of 1 mW makes the AD736 suitable for many battery-powered applications. A high input impedance of 1012 ? eliminates the need for an external buffer when interfacing with input attenuators. A low impedance input is available for those applications that require an input signal up to 300 mV rms operating from low power supply voltages.

The AD737 is a low power, precision, monolithic, true rms-to-dc converter. It is laser trimmed to provide a maximum error of ?0.2 mV ? 0.3% of reading with sine wave inputs. Furthermore, it maintains high accuracy while measuring a wide range of input waveforms, including variable duty cycle pulses and triac (phase) controlled sine waves. The low cost and small physical size of this converter make it suitable for upgrading the performance of non-rms precision rectifiers in many applications. Compared to these circuits, the AD737 offers higher accuracy at equal or lower cost.The AD737 computes the rms value of both the ac and dc input voltages, and is ac-coupled by adding an input capacitor. In this mode, the AD737 can resolve input signal levels of 100 ?V rms or less, despite variations in temperature or supply voltage. High accuracy is maintained for input waveforms with crest factors of 1 to 3 and crest factors at 2.5% or less with respect to full-scale input level.The AD737 has no output buffer amplifier, thereby significantly reducing dc offset errors occurring at the output, which makes the device highly compatible with high input impedance ADCs.Requiring only 160 ?A of power supply current, the AD737 is optimized for use in portable multimeters and other battery-powered applications. In power-down mode, the standby supply current in is typically 25 ?A.The AD737 has both high (1012 ?) and low impedance input options. The high-Z FET input connects high source impedance input attenuators, and a low impedance (8 k?) input accepts rms voltages of up to 0.9 V while operating from the minimum power supply voltage of ?2.5 V. The two inputs can be used either single ended or differentially.The AD737 achieves 1% of reading error bandwidth, exceeding 10 kHz for input amplitudes from 20 mV rms to 200 mV rms, while consuming only 0.72 mW.The AD737 is available in two performance grades. The AD737J and AD737K grades operate over the commercial temperature range of 0?C to 70?C. The AD737JR-5 is tested with supply voltages of ?2.5 V dc. The AD737A grade operates over the industrial temperature range of ?40?C to +85?C. The AD737 is available in two low cost, 8-lead packages: PDIP and SOIC_N.PRODUCT HIGHLIGHTS Computes average rectified, absolute, or true rms value of a signal regardless of waveform. Only one external component, an averaging capacitor, is required for the AD737 to perform true rms measurement. The standby power consumption of 125 ?W makes the AD737 suitable for battery-powered applications.

The AD8038 (single) and AD8039 (dual) amplifiers are high speed (350 MHz) voltage feedback amplifiers with an exceptionally low quiescent current of 1.0 mA/amplifier typical (1.5 mA maximum). The AD8038 single amplifier in the 8-lead SOIC package has a disable feature. Despite being low power and low cost, the amplifier provides excellent overall performance. Additionally, it offers a high slew rate of 425 V/?s and a low input offset voltage of 3 mV maximum.The Analog Devices, Inc., proprietary XFCB process allows low noise operation (8 nV/?Hz and 600 fA/?Hz) at extremely low quiescent currents. Given a wide supply voltage range (3 V to 12 V), wide bandwidth, and small packaging, the AD8038 and AD8039 amplifiers are designed to work in a variety of applications where power and space are at a premium.The AD8038 and AD8039 amplifiers have a wide input common-mode range of 1 V from either rail and swing to within 1 V of each rail on the output. These amplifiers are optimized for driving capacitive loads up to 15 pF. If driving larger capacitive loads, a small series resistor is needed to avoid excessive peaking or overshoot.The AD8039 amplifier is available in a 8-lead SOT-23 package, and the single AD8038 is available in both an 8-lead SOIC and a 5-lead SC70 package. These amplifiers are rated to work over the industrial temperature range of ?40?C to +85?C.Applications Battery-powered instrumentation Filters A/D drivers Level shifting Buffering Photo multipliers

The AD8040 is a quad, rail-to-rail input and output high speed amplifier with a quiescent current of only 1.3 mA per amplifier. Despite its low power consumption, the amplifier provides excellent performance with 125MHz small signal bandwidth and 60 V/?s slew rate. ADI's proprietary XFCB process enables high speed and high performance on low power.This amplifier exhibits true single-supply operation with rail-to-rail input and output performance for supply voltages ranging from 2.7V to 12V. The input voltage range extends 200 mV beyond each rail without phase reversal. The dynamic range of the output extends to within 40 mV of each rail.The AD8040 provides excellent signal quality with minimal power dissipation. At G=+1, SFDR is -72dBc at 1MHz and settling time to 0.1% is only 80 ns. Low distortion and fast settling performance makes this amplifier a suitable driver for single-supply A/D converters.The versatility of the AD8040 allows the user to operate the amplifier on a wide range of supplies while consuming less than 6.5 mW of power. This feature extends the operation time in applications ranging from battery-powered systems with large bandwidth requirements to high speed systems where component density requires lower power dissipation.The amplifier is rated over the extended industrial temperature range, -40?C to +125?C.