The ADM3058E is a 5.7 kV rms isolated controller area network (CAN) physical layer transceiver with a high perfor-mance, basic feature set. The ADM3058E fully meets the CAN flexible data rate (CAN FD) ISO 11898-2:2016 requirements and is further capable of supporting data rates as high as 12 Mbps.The device employs Analog Devices, Inc., iCoupler? technology to combine a 2-channel isolator and a CAN transceiver into a single small outline integrated circuit (SOIC) surface-mount package. The ADM3058E is a fully isolated solution for CAN and CAN FD applications. The ADM3058E provides isolation between the CAN controller and physical layer bus. Safety and regulatory approvals (pending) for a 5.7 kV rms withstand voltage and a 1500 V peak working voltage ensure that the ADM3058E meets application isolation requirements.Low loop propagation delays and the extended common-mode range of ?25 V support robust communication on longer bus cables. Dominant timeout functionality protects against bus lock up in a fault condition, and current limiting and thermal shutdown features protect against output short circuits. The CAN bus input and output pins are protected to ?40 V against accidental connection to a +24 V bus supply. The device is fully specified over the ?40?C to +125?C industrial temperature range.ApplicationsCANOpen, DeviceNet, and other CAN bus implementationsIndustrial automationProcess control and building controlTransport and infrastructure

The ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E are 3.0 V to5.5 V, IEC electrostatic discharge (ESD) protected RS-485transceivers, allowing the devices to withstand ?12 kV contactdischarges on the transceiver bus pins without latch-up ordamage. The ADM3062E/ADM3064E/ADM3066E/ADM3068Efeature a VIO logic supply pin that allows a flexible digital interfacecapable of operating as low as 1.62 V. The ADM3065E/ADM3066E/ADM3067E/ADM3068E aresuitable for high speed, 50 Mbps, bidirectional data communication on multipoint bus transmission lines. The ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E feature a 1/4 unit load inputimpedance that allows up to 128 transceivers on a bus. TheADM3061E/ADM3062E/ADM3063E/ADM3064E models offerall of the same features as the ADM3065E/ADM3066E/ADM3067E/ADM3068E models at a low 500 kbps data rate thatis suitable for operation over long cable runs. The ADM3061E/ADM3062E/ADM3065E/ADM3066E are halfduplex RS-485 transceivers, fully compliant to the PROFIBUS?standard with increased 2.1 V bus differential voltage at VCC ?4.5 V. The ADM3063E/ADM3064E/ADM3067E/ADM3068Eare full duplex RS-485 transceiver options. The RS-485 transceivers are available in a number of spacesaving packages, including the 10-lead, 3 mm ? 3 mm lead framechip-scale package (LFCSP), the 8-lead or 10-lead, 3 mm ? 3 mmmini small outline package (MSOP), and the 8-lead or 14-lead,narrow body standard small outline packages (SOIC_N).Models with operating temperature ranges of ?40?C to +125?Cand ?40?C to +85?C are available. Excessive power dissipation caused by bus contention or byoutput shorting is prevented by a thermal shutdown circuit. If asignificant temperature increase is detected in the internal drivercircuitry during fault conditions, this feature forces the driveroutput into a high impedance state. The ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E guarantee alogic high receiver output when the receiver inputs are shorted,open, or connected to a terminated transmission line with alldrivers disabled. Table 2 in the data sheet presents an overview of the ADM3061E/ADM3062E/ADM3063E/ADM3064E/ADM3065E/ADM3066E/ADM3067E/ADM3068E data rate capability across temperature, power supply,and package options. Refer to the Ordering Guide section for model numbering.APPLICATIONS Industrial fieldbuses Process control Building automation PROFIBUS networks Motor control servo drives and encoders?

The ADN4620/ADN4621 are dual-channel, signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 2.5 Gbps with very low jitter. The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation to provide drop-in galvanic isolation of LVDS signal chains. AC coupling and/or level shifting to the LVDS receivers and from the LVDS drivers allows isolation of other high speed signals, such as current mode logic (CML).The ADN4620/ADN4621 include a refresh mechanism to monitor the input and output states and ensure that they remain the same in the absence of data transitions (for example, at power-on). For lower power consumption and high speed operation with low jitter, the isolator circuits rely on 1.8 V supplies, while 3.3 V supplies are used for LVDS receivers to support the full common-mode range with an input voltage range (input common mode plus differential input voltage) of 0 V to 2.4 V per Table 2 in the data sheet.The devices are fully specified over a wide industrial temperature range and are available in a compact SSOP package with 5.3 mm creepage (for reinforced insulation at ac mains voltages).APPLICATIONS Analog front-end isolation Data plane isolation Isolated high speed clock and data links Multigigabit serialization/deserialization (SERDES) PCB-to-PCB optical replacement (for example, short reach fiber)Protected by U.S. Patents 7,075,329; 9,941,565; and 10,205,442. Other patents are pending.

The ADN4650/ADN4651/ADN46521 are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 600 Mbps with very low jitter.The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation, to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This technology allows drop-in isolation of an LVDS signal chain.Multiple channel configurations are offered, and the LVDS receivers on the ADN4651/ADN4652 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated, but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout regulator (LDO) can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and are available in a 20-lead, wide body SOIC package with 5 kV rms isolation or a 20-lead SSOP package with 3.75 kV rms isolation.Applications Analog front-end (AFE) isolation Data plane isolation Isolated high speed clock and data links Isolated serial peripheral interface (SPI) over LVDS

The ADN4650/ADN4651/ADN46521 are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 600 Mbps with very low jitter.The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation, to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This technology allows drop-in isolation of an LVDS signal chain.Multiple channel configurations are offered, and the LVDS receivers on the ADN4651/ADN4652 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated, but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout regulator (LDO) can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and are available in a 20-lead, wide body SOIC package with 5 kV rms isolation or a 20-lead SSOP package with 3.75 kV rms isolation.Applications Analog front-end (AFE) isolation Data plane isolation Isolated high speed clock and data links Isolated serial peripheral interface (SPI) over LVDS

The ADN4654/ADN4655/ADN46561? are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 1.1 Gbps with low jitter. The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This integration allows drop-in isolation of an LVDS signal chain.The ADN4654/ADN4655/ADN4656 comprise multiple channel configurations, and the LVDS receivers on the ADN4655 and ADN4656 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout (LDO) regulator can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and come in a 20-lead, wide body SOIC_W package with 5 kV rms isolation or in a 20-lead SSOP package with 3.75 kV rms isolation.Applications Isolated video and imaging data Analog front-end isolation Data plane isolation Isolated high speed clock and data links1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.

The ADN4691E?/?ADN4693E?/?ADN4696E?/ ADN4697E aremultipoint, low voltage differential signaling (M-LVDS)transceivers (driver and receiver pairs) that can operate at up to200 Mbps (100 MHz). The receivers detect the bus state with adifferential input of as little as 50 mV over a common-modevoltage range of ?1 V to +3.4 V. ESD protection of up to ?15 kVis implemented on the bus pins. The devices adhere to theTIA/EIA-899 standard for M-LVDS and complement TIA/EIA-644 LVDS devices with additional multipoint capabilities.The ADN4691E / ADN4693E are Type 1 receivers with 25 mV ofhysteresis so that slow-changing signals or loss of input does notlead to output oscillations. The ADN4696E / ADN4697E areType 2 receivers exhibiting an offset threshold, guaranteeing theoutput state when the bus is idle (bus-idle fail-safe) or the inputs areopen (open-circuit fail-safe).The devices are available as half-duplex in an 8-lead SOIC package(the ADN4691E / ADN4696E) or as full-duplex in a 14-leadSOIC package (the ADN4693E / ADN4697E).APPLICATIONS Backplane and cable multipoint data transmission Multipoint clock distribution Low power, high speed alternative to shorter RS-485 links Networking and wireless base station infrastructure

The ADPD103 is a highly efficient photometric front end with an integrated 14-bit analog-to-digital converter (ADC) and a 20-bit burst accumulator that works in concert with flexible light emitting diode (LED) drivers. It is designed to stimulate an LED and measure the corresponding optical return signal. The data output and functional configuration occur over a 1.8 V I2C interface. The control circuitry includes flexible LED signaling and synchronous detection. The analog front end (AFE) features best-in-class rejection of signal offset and corruption due to modulated interference commonlycaused by ambient light.Couple the ADPD103 with a low capacitance photodiode of <100 pF for optimal performance. The ADPD103 can be used with any LED.Aplications Body worn health and fitness monitors, for example, heart rate monitoring Clinical measurements, for example, SpO2 Industrial monitoring Background light measurements

The ADPD144RI is a highly integrated, photometric front end optimized for photoplethysmography (PPG) detection of blood oxygenation (SpO2) by synchronous detection in red and infrared wavelengths. Synchronous measurement allows rejection of both dc and ac ambient light interference with extremely low power consumption.The module combines highly efficient, light emitting diode (LED) emitters and a sensitive 4-channel, deep diffusion photodiode (PD1 to PD4) with a custom application specific integrated circuit (ASIC) in a compact package that provides optical isolation between the integrated LED emitters and the detection photodiodes to improve through tissue, signal-tonoise ratio (SNR).The ASIC consists of a 4-channel analog front end (AFE) with two independently configurable datapaths with separate gain and filter settings, a 14-bit analog-to-digital converter (ADC) with a burst accumulator, two flexible, independently configurable, LED drivers, and a digital control block. The digital control block provides AFE and LED timing, signal processing, and communication. Data output and functional configuration occur over a 1.8 V I2C interface.Applications Optical heart rate monitoring Reflective SpO2 measurement

The EVAL-ADPD188BIZ-S2 evaluation board provides users with a simple means of evaluating the ADPD188BI optical module along with the EVAL-CHAMBER smoke chamber for smoke and aerosol detection applications. The evaluation system is composed of the EVAL-ADPD188BIZ-S2 evaluation board, the EVAL-ADPDUCZ microcontroller board, the optional EVAL-CHAMBER smoke chamber, and the Wavetool Evaluation Software graphical user interface (GUI). The software provides users with both low level and high level configurability, real-time frequency and time domain analysis, and user datagram protocol (UDP) transfer capability so that the evaluation board can easily interface to the user development system. The EVAL-ADPD188BIZ-S2 is powered through the ribbon cable from the EVAL-ADPDUCZ microcontroller board (ordered separately). For full details on the ADPD188BI, see the ADPD188BI data sheet, which should be consulted in conjunction with this user guide when using these evaluation boards.