Panasonic PAN1721 SERIES EVALUATION KIT

Bluetooth Development Tools - 802.15.1 PAN1323 Evaluation Kit

16V, 6A, I2C-CONTROLLED, SINGLE-CELL SWITCHING CHARGER WITH POWER PATH MANAGEMENT AND 3.65A BOOST OUTPUT EVALUATION BOARD

The KTS1640 Evaluation (EVAL) Kit is used to demonstrate and evaluate the KTS1640 functionality, performance, and PCB layout. The kit includes a fully assembled and tested PCB with the KTS1640 IC installed, two pairs of high-current XT30-to-Banana power cables, and a printed copy of the Quick Start Guide (also contained within this document).

Kit Contents:

• KTS1640 EVAL fully assembled PCB
• XT30-to-Banana power cables, red/black pair (2 Pairs)
• Anti-static bag
• Quick Start Guide, printed 1 page (A4 or US Letter)
• EVAL Kit box

Power Management IC Development Tools Evaluation Board for MPQ4321

The AD91641 is a high performance, 16-bit digital-to-analog converter (DAC) and direct digital synthesizer (DDS) that supports update rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2? interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.The DDS consists of a bank of 32, 32-bit numerically controlled oscillators (NCOs), each with its own phase accumulator.When combined with a 100 MHz serial peripheral interface (SPI) and fast hop modes, phase coherent fast frequency hopping (FFH) is enabled, with several modes to support multiple applications.In baseband mode, wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of one carrier up to the full maximum spectrum of 1.791 GHz of signal bandwidth. A 2? interpolator filter (FIR85) enables the AD9164 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode? operation, the AD9164 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9164 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.An SPI interface configures the AD9164 and monitors the status of all registers. The AD9164 is offered in a 165-ball, 8 mm ? 8 mm, 0.5 mm pitch CSP_BGA package, and a 169-ball, 11 mm ? 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance and multiband wireless communications standards with margin.?Applications Broadband communications systems DOCSIS 3.1 CMTS/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point

TPS61253 Chip Scale step-up dc-dc converters; 3.5-MHz high efficiency Evaluation Module

EVAL MODULE FOR XILINX FPGA

EVAL KIT FOR CEN

STARTER KIT TMS320VC5509A DSP