The EVAL-MICCANVASZ microphone canvas provides a platform for the development and evaluation of microphone beamforming arrays. 15 microphones, arranged as a ring of eight, a ring of six, and a single in the center, provide flexibility and symmetry suitable to many applications.

The SSM2517 is a PDM digital input Class-D power amplifierthat offers higher performance than existing DAC plus Class-Dsolutions. The SSM2517 is ideal for power sensitive applications,such as mobile phones and portable media players, where systemnoise can corrupt the small analog signal sent to the amplifier.The SSM2517 combines an audio digital-to-analog converter(DAC), a power amplifier, and a PDM digital interface on a singlechip. The integrated DAC plus analog ?-? modulator architectureenables extremely low real-world power consumption fromdigital audio sources with excellent audio performance. Usingthe SSM2517, audio can be transmitted digitally to the audioamplifier, significantly reducing the effect of noise sources such asGSM interference or other digital signals on the transmitted audio.The SSM2517 is capable of delivering 2.4 W of continuous outputpower with <1% THD + N driving a 4 ? load from a 5.0 V supply.The SSM2517 features a high efficiency, low noise modulationscheme that requires no external LC output filters. The closed-loop,three-level modulator design retains the benefits of an all-digitalamplifier, yet enables very good PSRR and audio performance. Themodulation continues to provide high efficiency even at low outputpower and has an SNR of 96 dB. Spread-spectrum pulse densitymodulation is used to provide lower EMI-radiated emissionscompared with other Class-D architectures.The SSM2517 has a four-state gain and sample frequency selectionpin that can select two different gain settings, optimized for 3.6 Vand 5 V operation. This same pin also controls the internal digitalfiltering and clocking, which can be set for 64 ? fS or 128 ? fS inputsample rates to support both 3 MHz and 6 MHz PDM clock rates.The SSM2517 has a micropower shutdown mode with a typicalshutdown current of 1 ?A for both power supplies. Shutdown isenabled automatically by gating input clock and data signals. Astandby mode can be entered by applying a designated PDM stopcondition sequence. The device also includes pop-and-click suppressioncircuitry. This suppression circuitry minimizes voltageglitches at the output when entering or leaving the low powerstate, reducing audible noises on activation and deactivation.The SSM2517 is specified over the industrial temperature rangeof ?40?C to +85?C. It has built-in thermal shutdown and outputshort-circuit protection. It is available in a 9-ball, 1.5 mm ? 1.5 mmwafer level chip scale package (WLCSP).Applications Mobile handsets

The SSM2537 is a PDM digital input Class D power amplifier that offers higher performance than existing DAC plus Class D solutions. The SSM2537 is ideal for power sensitive applications where system noise can corrupt the small analog signal sent to the amplifier, such as mobile phones and portable media players.The SSM2537 combines an audio digital-to-analog converter (DAC), a power amplifier, and a PDM digital interface on a single chip. The integrated DAC plus analog ?-? modulator architecture enables extremely low real-world power consumption from digital audio sources with excellent audio performance. Using the SSM2537, audio can be transmitted digitally to the audio amplifier, significantly reducing the effect of noise sources such as GSM interference or other digital signals on the transmitted audio. The SSM2537 is capable of delivering 2.5 W of continuous output power with <1% THD + N driving a 4 ? load from a 5.0 V supply.The SSM2537 features a high efficiency, low noise modulation scheme that requires no external LC output filters. The closed-loop, three-level modulator design retains the benefits of an all-digital amplifier, yet enables very good PSRR and audio performance. The modulation continues to provide high efficiency even at low output power and has an SNR of 103 dB PDM input. Spread-spectrum pulse density modulation is used to provide lower EMI-radiated emissions compared with other Class D architectures.The SSM2537 has a four-state gain and sample frequency selection pin that can select two different gain settings, optimized for 3.6 V and 5 V operation. This same pin also controls the internal digital filtering and clocking, which can be set for 64 ? fS or 128 ? fS input sample rates to support both 3 MHz and 6 MHz PDM clock rates.The SSM2537 has a micropower shutdown mode with a typical shutdown current of 1 ?A for both power supplies. Shutdown is enabled automatically by gating input clock and data signals. A standby mode can be entered by applying a designated PDM stop condition sequence. The device also includes pop-and-click suppression circuitry. This suppression circuitry minimizes voltage glitches at the output when entering or leaving the low power state, reducing audible noises on activation and deactivation.The SSM2537 is specified over the industrial temperature range of ?40?C to +85?C. It has built-in thermal shutdown and output short-circuit protection. It is available in a 9-ball, 1.3 mm ? 1.3 mm wafer level chip scale package (WLCSP).Applications Mobile handsets

The SSM3302 is a fully integrated, high efficiency, stereo Class-D audio amplifier. The application circuit requires minimal externalcomponents and operates from a single 7 V to 18 V supply. The device is capable of delivering 2 ? 10 W of continuous output power into a 4 ? load (or 2 ? 8 W into 8 ?) with 98 dB. Spread spectrum pulse density modulation (PDM) is used toprovide lower EMI radiated emissions compared with other Class-D architectures. The SSM3302 includes an optional modulation select pin (ultralow EMI emission mode) that significantly reduces the radiated emissions at the Class-D outputs, particularly above 100 MHz. The SSM3302 can pass FCC Class-B emissions testing with an unshielded 20 inch cable using common-mode choke-based filtering.The fully differential input of the SSM3302 provides excellent rejection of common-mode noise on the input. The device also includes a highly flexible gain select pin that only requires one series resistor to choose a gain between 9 dB and 24 dB, with no change to the input impedance. The benefit of this is to improve gain matching between multiple SSM3302 devices within a single application compared with using external resistors to set gain.The SSM3302 includes an integrated voltage regulator thatgenerates a 5 V rail.The SSM3302 has a micropower shutdown mode with a typical shutdown current of 10 ?A. Shutdown is enabled by applying a logic low to the SD pin. The device also includes pop-and-click suppression circuitry that minimizes voltage glitches at the output during turn on and turn off, reducing audible noise during activation and deactivation.Other included features to simplify system level integration of the SSM3302 are input low-pass filtering to suppress out-ofband DAC noise interference to the pulse density modulator, fixed input impedance to simplify component selection across multiple platform production builds, and a thermal warning indicator pin.The SSM3302 is specified over the commercial temperaturerange (?40?C to +85?C). It has built-in thermal shutdown andoutput short-circuit protection. It is available in a halide-free,40-lead, 6 mm ? 6 mm lead frame chip scale package (LFCSP).APPLICATIONS Mobile computing Flat panel televisions Media docking stations Portable electronics Sound bars

The SSM3525 is a fully integrated, high efficiency, mono Class D audio amplifier with digital input and digitized output of output voltage, output current, and PVDD supply. The application circuit requires few external components and can operate from 4.5 V to 17 V (PVDD) and 1.8 V (IOVDD) supplies. It is capable of delivering 8.3 W of continuous output power into an 8 ? load (or 15.3 W into 4 ?) with <1% THD + N from a 12 V supply, or 30.2 W into an 4 ? load from a 17 V power supply, all with <1% THD + N. The SSM3525 features a high efficiency, low noise modulation scheme that requires no external inductor/capacitor (LC) output filters. This scheme continues to provide high efficiency even at low output power. It operates with 92% efficiency at 9W into an 8 ? load, 12V or 89% efficiency at 20 W into 4 ? from a 17 V supply, (should now match the table)and it has an signal-to-noise ratio (SNR) of 107 dB A weighted.Spread spectrum pulse density modulation provides lower electromagnetic interference (EMI) radiated emissions compared with other Class-D architectures, particularly above 100 MHz.The digital input eliminates the need of an external digital-to-analog converter (DAC). The SSM3525 has a micropower shutdown mode with a typical shut?down current of 90 nA at 12 V PVDD supply. Individual sense blocks can be powered down to save power when sense is not needed.The device also includes pop and click suppression circuitry that minimizes voltage glitches at the output during turn on and turn off.Current sensing is accomplished using an integrated analog-to-digital converter (ADC) and internal sense resistor. The digitized voltage and current information can be returned in various serial audio formats, including I2S, time division multiplexing (TDM) and pulse density modulation (PDM).The SSM3525 includes an integrated regulator to generate the required 5 V analog supply. Alternatively, if an external 5 V rail from a dc-to-dc converter is available, it can improve system efficiency.The SSM3525 is designed to operate with an I2C control interface and specified over the temperature range ?40?C to +85?C. It has built-in thermal shutdown and output short-circuit protection. It is available in a halide free, 23-ball, 2.26 mm ? 2.38 mm wafer-level chip scale package (WLCSP).Applications Mobile computing Portable electronics

The SSM4567 is a digital input Class-D power amplifier that includes an integrated boost converter, allowing higher output power than with a normal battery supply. This means that maximum output power is constant across the battery voltage range. The SSM4567 is ideal for power sensitive applications where system noise can corrupt the small analog signal sent to the amplifier, such as mobile phones, tablets, and portable media players.The SSM4567 combines an audio digital-to-analog converter (DAC), a power amplifier, and PDM or PCM (I2S/TDM) digital audio interfaces on a single chip. Using the SSM4567, audio can be transmitted digitally to the audio amplifier, significantly reducing the effect of noise sources on the transmitted audio and eliminate the need for input coupling capacitors. The SSM4567 is capable of delivering 2.5 W of continuous output power with <1% THD + N driving a 4 ? load from a 3.6 V supply.The SSM4567 can be controlled by I2C, PDM pattern control, or TDM control. It can also operate in standalone mode without a control interface.The SSM4567 includes circuitry to sense output current, output voltage, and the VBAT supply voltage. Current sensing is performed using an on-chip sense resistor that is connected between an output pin and the load. Output current and voltage are sent to an ADC. The outputs of these ADCs are available on the digital serial output port. The VBAT supply voltage can be used with an automatic gain control circuit that is fully configurable. This AGC can limit the maximum output at low battery voltages to avoid drawing too much current from the battery, thereby extending battery life.The SSM4567 features a high efficiency, low noise modulation scheme that requires no external LC output filters. The closed-loop, five-level modulator design retains the benefits of an all digital amplifier, yet enables very good PSRR and audio performance. The modulation continues to provide high efficiency even at low output power and has an SNR of 104 dB, A-weighted. Spread spectrum pulse density modulation is used to provide lower EMI radiated emissions compared with other Class-D architectures.The SSM4567 has a micropower shutdown mode with a typical shutdown current of 0.2 ?A for the VBAT power supply. Shutdown is enabled automatically by gating input clock and data signals.The SSM4567 is specified over the industrial temperature range of ?40?C to +85?C. It has a built-in thermal shutdown and amplifier and boost output short-circuit protection. It is available in a 19-ball, 1.74 mm ? 2.1 mm wafer level chip scale package (WLCSP).Applications Mobile handsets Tablets Portable media players

The ADPD2214 is an optical sensor optimized for biomedical applications. Very low power consumption and near theoretical signal-to-noise ratio (SNR) are achieved by packaging an ultralow capacitance deep junction silicon photodiode operated in zero bias photoconductive mode with a low noise current amplifier. The ADPD2214 offers a typical 75 kHz bandwidth performance, which is well suited for use with pulsed excitation. The ADPD2214 uses very little power during operation and incorporates a power-down pin, enabling power cycling to optimize battery life in portable applications. The ADPD2214 provides shot noise limited performance, making it an excellent choice for measuring signals with the highest possible fidelity in low light conditions. This combination of low power, very high SNR, and electromagnetic interference (EMI) immunity enables low-power system solutions not possible with traditional photodiode (PD) and transimpedance amplifier (TIA) systems.Applications Heart rate, pulse oximetry monitoring (photoplethysmography) Battery-powered medical sensors Chemical analysis

The ADuCM4050 microcontroller unit (MCU) is an ultra low power integrated microcontroller system with integrated power management for processing, control, and connectivity. The MCU system is based on the ARM? Cortex?-M4F processor. The MCU also has a collection of digital peripherals, embedded static random access memory (SRAM) and embedded flash memory, and an analog subsystem that provides clocking, reset, and power management capabilities in addition to an analog-to-digital converter (ADC) subsystem.This data sheet describes the ARM Cortex-M4F core and memory architecture used on the ADuCM4050 MCU. It does not provide detailed programming information about the ARM processor.The system features include an up to 52 MHz ARM Cortex-M4F processor, 512 kB of embedded flash memory with error correction code (ECC), an optional 4 kB cache for lower active power, and 128 kB system SRAM with parity. The ADuCM4050 features a power management unit (PMU), multilayer advanced microcontroller bus architecture (AMBA) bus matrix, central direct memory access (DMA) controller, and beeper interface.The ADuCM4050 features cryptographic hardware supporting advanced encryption standard (AES)-128 and AES-256 with secure hash algorithm (SHA)-256 and the following modes: electronic code book (ECB), cipher block chaining (CBC), counter (CTR), and cipher block chaining-message authentication code (CCM/CCM*) modes.The ADuCM4050 has protected key storage with key wrap/ unwrap, and keyed hashed message authentication code (HMAC) with key unwrap.The ADuCM4050 supports serial port (SPORT), serial peripheral interface (SPI), I2C, and universal asynchronous receiver/ transmitter (UART) peripheral interfaces.The ADuCM4050 features a real-time clock (RTC), general-purpose and watchdog timers, and programmable general-purpose input/output (GPIO) pins. There is a hardware cyclic redundancy check (CRC) calculator with programmable generator polynomial. The device also features a power on reset (POR) and power supply monitor (PSM), a 12-bit successive approximation register (SAR) ADC, a red/green/blue (RGB) timer for driving RGB LED, and a true random number generator (TRNG).To support low dynamic and hibernate power management, the ADuCM4050 MCU provides a collection of power modes and features such as dynamic- and software-controlled clock gating and power gating.For full details on the ADuCM4050 MCU, refer to the ADuCM4050 Ultra Low Power ARM Cortex-M4F MCU with Integrated Power Management Hardware Reference.Product Highlights Ultra low power consumption. Robust operation. Full voltage monitoring in deep sleep modes. ECC support on flash. Parity error detection on SRAM memory. Leading edge security. Fast encryption provides read protection to user algorithms. Write protection prevents device reprogramming by unauthorized code. Failure detection of 32 kHz low frequency external crystal oscillator (LFXTAL) via interrupt. SensorStrobe? for precise time synchronized sampling of external sensors. Works in hibernate mode, resulting in drastic current reduction in system solutions. Current consumption reduces by 10 times when using, for example, the ADXL363 accelerometer. Software intervention is not required after setup. No pulse drift due to software execution.Applications Internet of Things (IoT) Smart agriculture, smart building, smart metering, smart city, smart machine, and sensor network Wearables Fitness and clinical Machine learning and neural networks

The ADuCM3027/ADuCM3029 microcontroller units (MCUs) are ultra low power microcontroller systems with integrated power management for processing, control, and connectivity. The MCU system is based on the ARM? Cortex?-M3 processor, a collection of digital peripherals, embedded SRAM and flash memory, and an analog subsystem which provides clocking, reset, and power management capability in addition to an analog-to-digital converter (ADC) subsystem. For a feature comparison across the ADuCM3027/ADuCM3029 product offerings, see Table 1. Table 1. Product Flash Memory Options Device Embedded Flash Memory Size ADuCM3029 256 kB ADuCM3027 128 kB System features that are common across the ADuCM3027/ADuCM3029/ADuCM3029-1/ADuCM3029-2 MCUs include the following: Up to 26 MHz ARM Cortex-M3 processor Up to 256 kB of embedded flash memory with error correction code (ECC) Optional 4 kB cache for lower active power 64 kB system SRAM with parity Power management unit (PMU) Multilayer advanced microcontroller bus architecture (AMBA) bus matrix Central direct memory access (DMA) controller Beeper interface Serial port (SPORT), serial peripheral interface (SPI), inter-integrated circuit (I2C), and universal asynchronous receiver/transmitter (UART) peripheral interfaces Cryptographic hardware support with advanced encryption standard (AES) and secure hash algorithm (SHA)-256 Real-time clock (RTC) General-purpose and watchdog timers Programmable general-purpose input/output (GPIO) pins Hardware cyclic redundancy check (CRC) calculator with programmable generator polynomial Power-on reset (POR) and power supply monitor (PSM) 12-bit successive approximation register (SAR) ADC True random number generator (TRNG)To support low dynamic and hibernate power management, the ADuCM3027/ADuCM3029 MCUs provide a collection of power modes and features, such as dynamic and software controlled clock gating and power gating.The ADuCM3029-1 and ADuCM3029-2 MCU models share the same features and functionality as that of the ADuCM3029 MCU. All specifications pertaining to the ADuCM3027 and ADuCM3029 are also applicable to the ADuCM3029-1 and ADuCM3029-2.For full details on the ADuCM3027/ADuCM3029 MCUs, refer to the ADuCM302x Ultra Low Power ARM Cortex-M3 MCU with Integrated Power Management Hardware Reference Manual.Product Highlights Industry leading ultralow power consumption. Robust operation, including full voltage monitoring in deep sleep modes, ECC support on flash, and parity error detection on SRAM memory. Leading edge security. Fast encryption provides read protection to customer algorithms. Write protection prevents device reprogramming by unauthorized code. Failure detection of 32 kHz LFXTAL via interrupt. SensorStrobe? for precise time synchronized sampling of external sensors. Works in hibernate mode, resulting in drastic current reduction in system solutions. Current consumption reduces by 10 times when using, for example, the ADXL363 accelerometer. Software intervention is not required after setup. No pulse drift due to software execution.Applications Internet of Things (IoT) Electronic shelf label (ESL) and signage Smart infrastructure Smart lock Asset tracking Smart machine, smart metering, smart building, smart city, and smart agriculture Wearables Fitness and clinical Machine learning and neural network?

The ADuCM4050 microcontroller unit (MCU) is an ultra low power integrated microcontroller system with integrated power management for processing, control, and connectivity. The MCU system is based on the ARM? Cortex?-M4F processor. The MCU also has a collection of digital peripherals, embedded static random access memory (SRAM) and embedded flash memory, and an analog subsystem that provides clocking, reset, and power management capabilities in addition to an analog-to-digital converter (ADC) subsystem.This data sheet describes the ARM Cortex-M4F core and memory architecture used on the ADuCM4050 MCU. It does not provide detailed programming information about the ARM processor.The system features include an up to 52 MHz ARM Cortex-M4F processor, 512 kB of embedded flash memory with error correction code (ECC), an optional 4 kB cache for lower active power, and 128 kB system SRAM with parity. The ADuCM4050 features a power management unit (PMU), multilayer advanced microcontroller bus architecture (AMBA) bus matrix, central direct memory access (DMA) controller, and beeper interface.The ADuCM4050 features cryptographic hardware supporting advanced encryption standard (AES)-128 and AES-256 with secure hash algorithm (SHA)-256 and the following modes: electronic code book (ECB), cipher block chaining (CBC), counter (CTR), and cipher block chaining-message authentication code (CCM/CCM*) modes.The ADuCM4050 has protected key storage with key wrap/ unwrap, and keyed hashed message authentication code (HMAC) with key unwrap.The ADuCM4050 supports serial port (SPORT), serial peripheral interface (SPI), I2C, and universal asynchronous receiver/ transmitter (UART) peripheral interfaces.The ADuCM4050 features a real-time clock (RTC), general-purpose and watchdog timers, and programmable general-purpose input/output (GPIO) pins. There is a hardware cyclic redundancy check (CRC) calculator with programmable generator polynomial. The device also features a power on reset (POR) and power supply monitor (PSM), a 12-bit successive approximation register (SAR) ADC, a red/green/blue (RGB) timer for driving RGB LED, and a true random number generator (TRNG).To support low dynamic and hibernate power management, the ADuCM4050 MCU provides a collection of power modes and features such as dynamic- and software-controlled clock gating and power gating.For full details on the ADuCM4050 MCU, refer to the ADuCM4050 Ultra Low Power ARM Cortex-M4F MCU with Integrated Power Management Hardware Reference.Product Highlights Ultra low power consumption. Robust operation. Full voltage monitoring in deep sleep modes. ECC support on flash. Parity error detection on SRAM memory. Leading edge security. Fast encryption provides read protection to user algorithms. Write protection prevents device reprogramming by unauthorized code. Failure detection of 32 kHz low frequency external crystal oscillator (LFXTAL) via interrupt. SensorStrobe? for precise time synchronized sampling of external sensors. Works in hibernate mode, resulting in drastic current reduction in system solutions. Current consumption reduces by 10 times when using, for example, the ADXL363 accelerometer. Software intervention is not required after setup. No pulse drift due to software execution.Applications Internet of Things (IoT) Smart agriculture, smart building, smart metering, smart city, smart machine, and sensor network Wearables Fitness and clinical Machine learning and neural networks