The ADRF5027 is a nonreflective, single-pole, double-throw (SPDT) radio frequency (RF) switch manufactured in a silicon process.The ADRF5027 operates from 9 kHz to 44 GHz with better than 3.8 dB of insertion loss and 43 dB of isolation. The ADRF5027 features an all off control, where both RF ports are in an isolation state. The ADRF5027 has a nonreflective design and both of the RF ports are internally terminated to 50 ?.The ADRF5027 requires a dual-supply voltage of +3.3 V and ?3.3 V. The device employs complimentary metal-oxide semiconductor/low-voltage transistor-transistor logic (CMOS/LVTTL) logic-compatible controls.The ADRF5027 is pin compatible with the ADRF5026 fast switching version, which operates from 100 MHz to 44 GHz.The ADRF5027 RF ports are designed to match a characteristic impedance of 50 ?. For ultrawideband products, impedance matching on the RF transmission lines can further optimize high frequency insertion loss and return loss characteristics. Refer to the Narrow-Band Impedance Matching section for an example of a matched circuit that achieves a low insertion loss response of 2.2 dB from 28 GHz to 43 GHz.The ADRF5027 comes in a 20-terminal, 3 mm ? 3 mm, RoHS-compliant, land grid array (LGA) package and can operate from ?40?C to +105?C.Applications Industrial scanners Test and instrumentation Cellular infrastructure: 5G mmWave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

The ADRF5130 is a high power, reflective, 0.7 GHz to 3.8 GHz, silicon, single-pole, double-throw (SPDT) switch in a leadless, surface-mount package. The switch is ideal for high power and cellular infrastructure applications, like long-term evolution (LTE) base stations.The ADRF5130 has high power handling of 43 dBm (maximum) and 0.1 dB compression (P0.1dB) of 46 dBm, with a low insertion loss of 0.6 dB at 2 GHz and 0.7 dB at 3.5 GHz. On-chip circuitry operates at a single, positive supply voltage of 5 V and typical supply current of 1.06 mA, making the ADRF5130 an ideal alternative to pin diode-based switches.The device comes in a RoHS compliant, compact, 24-lead, 4 mm ? 4 mm LFCSP package.Applications Cellular/4G infrastructure Wireless infrastructure Military and high reliability applications Test equipment Pin diode replacement

The ADRF5144 is a reflective, single pole double-throw (SPDT) switch manufactured in the silicon process.The ADRF5144 operates from 1 GHz to 20 GHz with typical insertion loss of 0.85 dB and typical isolation of 48 dB. The device has a radio frequency (RF) input power handling capability of 40 dBm average power and TBD dBm peak power for the insertion loss path. The ADRF5144 also supports extended frequency range of 9 kHz to 26.5 GHz with derated power handling capability below 1 GHz and above 20 GHz.The ADRF5144 draws a low current of 130 ?A on the positive supply of +3.3 V and 510 ?A on negative supply of ?3.3 V. The device employs complementary metal-oxide semiconductor (CMOS)-/low voltage transistor to transistor logic (LVTTL)-compatible controls. The ADRF5144 requires no additional driver circuitry, making it an ideal alternative to GaN and PIN diode-based switches.The ADRF5144 can also operate with a single positive supply voltage (VDD) applied while the negative supply voltage (VSS) is tied to ground. In this operating condition, the small signal performance will be maintained while the switching characteristics, linearity and power handling performance will be derated, see Table 2 in the data sheet.The ADRF5144 comes in a 20-lead, 3.0 mm ? 3.0 mm, RoHS-compliant, land grid array (LGA) package and can operate from ?40?C to +85?C.APPLICATIONSTest instrumentationMilitary radios, radars, and electronic counter measuresSATCOMGaN and PIN diode replacement

The ADRF5731 is a silicon, 4-bit digital attenuator with a 30 dB attenuation control range in 2 dB steps.This device operates from 100 MHz to 40 GHz with better than 3.5 dB of insertion loss. The ATTIN port of the ADRF5720 has a radio frequency (RF) input power handling capability of 26 dBm average and 30 dBm peak for all states.The ADRF5731 requires a dual supply voltage of +3.3 V and ?3.3 V. The device features serial peripheral interface (SPI), parallel mode control, and complementary metal-oxide semiconductor (CMOS)-/low voltage transistor to transistor logic (LVTTL) compatible controls.The ADRF5731 is pin compatible with the ADRF5721 low frequency cutoff version, which operates from 9 kHz to 40 GHz.The ADRF5731 RF ports are designed to match a characteristic impedance of 50 ?.The ADRF5731 comes in a 16-terminal, 2.5 mm ? 2.5 mm, RoHS compliant, land grid array (LGA) package and operates from ?40?C to +105?C.Applications Industrial scanners Test and instrumentation Cellular infrastructure: 5G millimeter wave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

The ADRF6520 is a matched pair of fully differential low noise and low distortion programmable filters and variable gain amplifiers(VGAs). Each channel is capable of rejecting large, out of band interferers while reliably boosting the wanted signal, thus reducingthe bandwidth and resolution requirements on the analog-to-digital converters (ADCs). The excellent matching betweenchannels and their high spurious-free dynamic range over all gain and bandwidth settings make the ADRF6520 ideal forquadrature-based (IQ) communication systems with dense constellations, multiple carriers, and nearby interferers. Thefilter corners, enable, and dc offset correction loop enable are all programmable via a serial peripheral interface (SPI).The first VGA that precedes the filters offers 30 dB of continuous gain control with a maximum gain of 18 dB and sets a differentialinput impedance of 100 ?. The filters provide a four-pole Butterworth response with ?1 dB corner frequencies: 36 MHz,72 MHz, 144 MHz, 288 MHz, 432 MHz, 576 MHz, and 720 MHz. For operation beyond 720 MHz, the filter can be disabled andcompletely bypassed, thereby extending the ?1 dB bandwidth up to 1.25 GHz. A wideband rms detector is available tomonitor the signal at the filter inputs. A fixed gain amplifier of 6 dB immediately follows the filter. The postfilter VGA provides30 dB of continuous gain control with a maximum gain of 12 dB. The output buffers offer an additional 18 dB of gain andprovide a differential output impedance of 20 ?. The output buffers are capable of driving 1.5 V p-p into 100 ? loads at betterthan 55 dBc nominal for the third-order intermodulation distortion (IMD3). Independent, built in, dc offset correctionloops for each channel can be disabled via the SPI if fully dc-coupled operation is desired. The high-pass corner frequency isdetermined by external capacitors on the CHP1 and CHP2 pins and the postfilter VGA gain.The ADRF6520 operates from a 3.15 V to 3.45 V supply and consumes a maximum supply current of 425 mA. When fullydisabled, it consumes ?10 mA. The ADRF6520 is fabricated in an advanced silicon-germanium BiCMOS process and isavailable in a 32-lead, exposed pad LFCSP. Performance is specified over the ?40?C to +85?C temperature range.Applications Point-to-point and point-to-multipoint radios Baseband IQ receivers Diversity receivers ADC drivers Instrumentation Medical

The ADRF6850 is a highly integrated broadband quadrature demodulator, frequency synthesizer, and variable gain amplifier (VGA). The device covers an operating frequency range from 100 MHz to 1000 MHz for use in both narrow-band and wideband communications applications, performing quadrature demodulation from IF directly to baseband frequencies.The ADRF6850 demodulator includes a high modulus fractional-N frequency synthesizer with integrated VCO, providing better than 1 Hz frequency resolution, and a 60 dB gain control range provided by a front-end VGA.Control of all the on-chip registers is through a user-selected SPI interface or I2C interface. The device operates from a single power supply ranging from 3.15 V to 3.45 V.APPLICATIONS Broadband communications Cellular communications Satellite communications

The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/ outputs (GPIOs) that provide an array of digital control options are also integrated.To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9029 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.This device contains a fully integrated, low power digital predistortion (DPD) adaptation engine for use in power amplifier linearization. DPD enables use of high efficiency power amplifiers, reducing the power consumption of base station radios while also reducing the number of SERDES lanes necessary to interface with baseband processors.The low power crest factor reduction (CFR) engine of the ADRV9029 reduces the peak to average ratio (PAR) of the input signal, enabling higher efficiency transmit line ups while reducing the processing load on baseband processors.The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.The ADRV9029 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9029 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).APPLICATIONS3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

The ADV3200/ADV3201 are 32 ? 32 analog crosspoint switch matrices. They feature a selectable sync-tip clamp input forac-coupled applications and an on-screen display (OSD) insertion mux. With ?48 dB of crosstalk and ?80 dB isolationat 5 MHz, the ADV3200/ADV3201 are useful in many high density routing applications. The 0.1 dB flatness out to 60 MHz makes the ADV3200/ADV3201 ideal for composite video switching.The 32 independent output buffers of the ADV3200/ADV3201 can be placed into a high impedance state for paralleling crosspoint outputs so that off-channels present minimal loading to an output bus if building a larger array. The part is available in gain of +1 (ADV3200) or +2 (ADV3201) for ease of use in back-terminated load applications. A single 5 V supply, dual ?2.5 V supplies, or dual ?3.3 V supplies (G = +2) can be used while consuming only 250 mA of idle current with all outputs enabled. The channel switching is performed via a double buffered, serial digital control, which can accommodate daisy chaining of several devices. The ADV3200/ADV3201 are packaged in a 176-lead exposed pad LQFP (24 mm ? 24 mm) and are available over the extended industrial temperature range of ?40?C to +85?C.Applications CCTV surveillance Routing of high speed signals including ????????Composite video (NTSC, PAL, S, SECAM) ????????RGB and component video routing ????????Compressed video (MPEG, Wavelet) Video conferencing?

The LTC1410 is a 0.65?s, 1.25Msps, 12-bit sampling A/D converter that draws only 160mW from ?5V supplies. This easy-to-use device includes a high dynamic range sample-and-hold, a precision reference and requires no external components. Two digitally selectable power shutdown modes provide flexibility for low power systems.The LTC1410?s full-scale input range is ?2.5V. Maximum DC specifications include ?1LSB INL and ?1LSB DNL over temperature. Outstanding AC performance includes 71dB S/(N + D) and 82dB THD at the Nyquist input frequency of 625kHz.The unique differential input sample-and-hold can acquire single-ended or differential input signals up to its 20MHz bandwidth. The 60dB common mode rejection allows users to eliminate ground loops and common mode noise by measuring signals differentially from the source.The ADC has a ?P compatible, 12-bit parallel output port. There is no pipeline delay in the conversion results. A separate convert start input and a data ready signal (BUSY) ease connections to FIFOs, DSPs and microprocessors.Applications Telecommunications Digital Signal Processing Multiplexed Data Acquisition Systems High Speed Data Acquisition Spectrum Analysis Imaging Systems

DC1010A-B: Demo Board for the LTC2489 16-Bit 2-/4-Channel ΔΣ ADC with Easy Drive Input Current Cancellation and I2C Interface.