The ADP5014 combines four high performance, low noise buck regulators in a 40-lead LFCSP package. Relying on its low output noise (~25 ?V rms when VOUT ? VREF), the low noise buck regulator enables the powering up of the noise sensitive signal chain products.All channels in the ADP5014 integrate high-side and low-side power metal-oxide semiconductor field effect transistors (MOSFET). Channel 1 and Channel 2 deliver a programmable output current of 2 A or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration provides a single output with up to 8 A of current.Channel 3 and Channel 4 deliver a programmable output current of 1 A or 2 A. Combining Channel 3 and Channel 4 in a parallel configuration can provide a single output with up to 4 A of current.The ADP5014 features two enable modes. The manual mode has four individual precision enable pins to enable each regulator manually. Alternatively, the sequence mode has one grouped precision enable signal with programmable power-up and power-down delay timers on each rail for specific rail sequence requirements.The switching frequency of the ADP5014 can be programmed or synchronized to an external clock from 500 kHz to 2.5 MHz.The ADP5014 offers other key features like selective forced pulse width modulation (FPWM)/power saving mode (PSM), an undervoltage output (UVO), active output discharge, and a power-good flag. Other safety features include input undervoltage lockout (UVLO), overvoltage protection (OVP), overcurrent protection (OCP) and thermal shutdown (TSD).Applications RF transceiver, high speed analog-to-digital converter (ADC)/digital-to-analog converter (DAC), mixed signal ASIC FPGA and processor applications Security and surveillance Medical applications

The ADP5024 combines two high performance buck regulators and one low dropout (LDO) regulators in a small, 24-lead 4 mm ? 4 mm LFCSP to meet demanding performance and board space requirements. The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set high, the buck regulators operate in forced PWM mode. When the MODE pin is set low, the buck regulators operate in PWM mode when the load current is above a predefined threshold. When the load current falls below a pre-defined threshold, the regulator operates in power save mode (PSM), improving the light load efficiency. The two bucks operate out of phase to reduce the input capacitor requirement. The low quiescent current, low dropout voltage, and wide input voltage range of the LDO extends the battery life of portable devices. The ADP5024 LDO maintains power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.Regulators in the ADP5024 are activated though dedicated enable pins. The default output voltages can be either externally set in the adjustable version or factory programmable to a wide range of preset values in the fixed voltage version.APPLICATIONS Power for processors, ASICS, FPGAs, and RF chipsets Portable instrumentation and medical devices Space constrained devices

The ADP5037 combines two high performance buck regulators and two low dropout (LDO) regulators in a small, 24-lead 4 mm ? 4 mm LFCSP to meet demanding performance and board spacerequirements.The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set high, the buck regulators operate in forced PWM mode. When the MODE pin is set low and the load is above a predefined threshold, the buck regulators operate in PWM mode. When the load current falls below apredefined threshold, the regulator operates in power savemode (PSM), improving the light-load efficiency.The two bucks operate out of phase to reduce the input capacitor requirement. The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5037 LDOs extend the battery life of portable devices. The ADP5037 LDOs maintain power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.Regulators in the ADP5037 are activated though dedicated enable pins. The default output voltages can be externally set in the adjustable version or factory programmable to a wide range of preset values in the fixed voltage version.APPLICATIONS Power for processors, ASICS, FPGAs, and RF chipsets Portable instrumentation and medical devices Space constrained devices?

The ADP5041 combines one high performance buck regulator and two low dropout (LDO) regulators in a small 20-lead LFCSP to meet demanding performance and board space requirements.The high switching frequency of the buck regulator enables use of tiny multilayer external components and minimizes board space.When the MODE pin is set to logic high, the buck regulator operates in forced PWM mode. When the MODE pin is set to logic low, the buck regulator operates in PWM mode when the load is around the nominal value. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving the light load efficiency. The low quiescent current, low dropout voltage, and wide input voltage range of the ADP5041 LDOs extend the battery life of portable devices. The ADP5041 LDOs maintain a power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage.Each regulator in the ADP5041 is activated by a high level on the respective enable pin. The output voltages of the regulators and the reset threshold are programmed through external resistor dividers to address a variety of applications. The ADP5041 contains supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. They also provide power-on reset signals. An on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period.

The ADP5050 combines four high performance buck regulators and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages up to 15 V with no preregulators.Channel 1 and Channel 2 integrate high-side power MOSFETs and low-side MOSFET drivers. External NFETs can be used in low-side power devices to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration can provide a single output with up to 8 A of current.Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver output current of 1.2 A.The switching frequency of the ADP5050 can be programmed or synchronized to an external clock. The ADP5050 contains a precision enable pin on each channel for easy power-up sequencing or adjustable UVLO threshold.The ADP5050 integrates a general-purpose LDO regulator with low quiescent current and low dropout voltage that provides up to 200 mA of output current.The optional I2C interface provides the user with flexible configuration options, including adjustable and fixed output voltage options, junction temperature overheat warning, low input voltage detection, and dynamic voltage scaling (DVS).APPLICATIONS Small cell base stations FPGA and processor applications Security and surveillance Medical applications

The ADP5052 combines four high performance buck regulators and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages up to 15 V with no preregulators.Channel 1 and Channel 2 integrate high-side power MOSFETs and low-side MOSFET drivers. External NFETs can be used in low-side power devices to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration can provide a single output with up to 8 A of current.Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver output current of 1.2 A.The switching frequency of the ADP5052 can be programmed or synchronized to an external clock. The ADP5052 contains a precision enable pin on each channel for easy power-up sequencing or adjustable UVLO threshold.The ADP5052 integrates a general-purpose LDO regulator with low quiescent current and low dropout voltage that provides up to 200 mA of output current.Applications Small cell base stations FPGA and processor applications Security and surveillance Medical applications

The ADP5065 charger is fully compliant with the USB 2.0, USB 3.0, and USB Battery Charging Specification 1.1 and enables charging via the mini USB VBUS pin from a wall charger, car charger, or USB host port.The ADP5065 operates from a 4 V to 5.5 V input voltage range but is tolerant of voltages of up to 20 V. This alleviates the concerns about the USB bus spiking during disconnect or connect scenarios.The ADP5065 also features an internal FET between the dc-to-dc charger output and the battery. This permits battery isolation and, hence, system powering under a dead battery or no battery scenario, which allows for immediate system function on connection to a USB power supply.Based on the type of USB source, which is detected by an external USB detection chip, the ADP5065 can be set to apply the correct current limit for optimal charging and USB compliance.The ADP5065 comes in a very small and low profile 20-lead WLCSP (0.5 mm pitch spacing) package.The overall solution requires only five small, low profile external components consisting of four ceramic capacitors (one of which is the battery filter capacitor), one multilayer inductor. In addition to these components, there is one optional dead battery situation default setting resistor. This configuration enables a very small PCB area to provide an integrated and performance enhancing solution to USB battery charging and power rail provision. APPLICATIONS Digital still cameras Digital video cameras Single cell Li-Ion portable equipment PDA, audio, GPS devices Mobile phones?

The ADP5071 is a dual high performance dc-to-dc regulator that generates independently regulated positive and negative rails.The input voltage range of 2.85 V to 15 V supports a wide variety of applications. The integrated main switch in both regulators enables generation of an adjustable positive output voltage up to +39 V and a negative output voltage down to ?39 V below input voltage.The ADP5071 operates at a pin selected 1.2 MHz/2.4 MHz switching frequency. The ADP5071 can synchronize with an external oscillator from 1.0 MHz to 2.6 MHz to ease noise filtering in sensitive applications. Both regulators implement programmable slew rate control circuitry for the MOSFET driver stage to reduce electromagnetic interference (EMI).Flexible start-up sequencing is provided with the options of manual enable, simultaneous mode, positive supply first, and negative supply first.The ADP5071 includes a fixed internal or resistor programmable soft start timer to prevent inrush current at power-up. During shutdown, both regulators completely disconnect the loads from the input supply to provide a true shutdown.Other key safety features in the ADP5071 include overcurrent protection (OCP), overvoltage protection (OVP), thermal shutdown (TSD), and input undervoltage lockout (UVLO).The ADP5071 is available in a 20-lead LFCSP or in a 20-lead TSSOP and is rated for a ?40?C to +125?C junction temperature range.Applications Bipolar amplifiers, ADCs, DACs, and multiplexers Charge-coupled device (CCD) bias supply Optical module supply RF power amplifier (PA) bias

The ADP5076 is a dual, high performance, dc-to-dc regulator that generates independently regulated positive and negative rails. The input voltage range of 2.85 V to 5.5 V supports a wide variety of applications. The integrated main switch in both regulators enables generation of an adjustable positive output voltage up to +35 V and a negative output voltage down to ?30 V.?The ADP5076 operates at a pin selected 1.2 MHz or 2.4 MHz switching frequency. The ADP5076 can synchronize with an external oscillator from 1.0 MHz to 2.6 MHz to ease noise filtering in sensitive applications. Both regulators implement programmable slew rate control circuitry for the metal-oxide semiconductor field effect transistor (MOSFET) driver stage to reduce electromagnetic interference (EMI). Flexible start-up sequencing is provided with the options of manual enable, simultaneous mode, positive supply first, and negative supply first.?The ADP5076 includes a fixed internal or resistor programmable soft start timer to prevent inrush current at power-up. Other key safety features in the ADP5076 include overcurrent protection (OCP), overvoltage protection (OVP), thermal shutdown (TSD), and input undervoltage lockout (UVLO). The ADP5076 is available in a 20-ball wafer level chip scale package (WLCSP) and is rated for a ?40?C to +125?C junction temperature range.?Applications Bipolar amplifiers, ADCs, DACs, and multiplexers Charge coupled device (CCD) bias supply Optical module supply RF power amplifier bias Time of flight module supply

The ADP5090 is an integrated boost regulator that converts dc power from PV cells or TEGs. The device charges storage elements such as rechargeable Li-Ion batteries, thin film batteries, super capacitors, and conventional capacitors, and powers up small electronic devices and battery-free systems.The ADP5090 provides efficient conversion of the harvested limited power from a 16 ?W to 200 mW range with sub-?W operation losses. With the internal cold-start circuit, the regulator can start operating at an input voltage as low as 380 mV. After cold startup, the regulator is functional at an input voltage range of 80 mV to 3.3 V.By sensing the input voltage at the VIN pin, the control loop keeps the input voltage ripple in a fixed range to maintain stable dcto-dc boost conversion. The VIN OCV sensing and programmable regulation points of the input voltage allow extraction of the highest possible energy from the PV cell or TEG harvester. A programmable minimum operation threshold (MINOP) enables boost shutdown during a low light condition. In addition, the DIS_SW pin can temporarily shut down the boost regulator and is RF transmission friendly.The charging control function of ADP5090 protects rechargeable energy storage, which is achieved by monitoring the battery voltage with programmable charging termination voltage and shutdown discharging voltage. In addition, a programmable PGOOD flag monitors the SYS voltage.An optional primary cell battery can be connected and managed by an integrated power path management control block that automatically switches the power source from the energy harvester, rechargeable battery, and primary cell battery.The ADP5090 is available in a 16-lead, 3 mm ? 3 mm LFCSP and is rated for a ?40?C to +125?C junction temperature range.APPLICATIONS PV cell energy harvesting TEG energy harvesting Battery regulator powered by solar panel Industrial monitoring Self-powered wireless sensor devices Portable and wearable devices with energy harvesting