The ADM4168E is a dual RS-422 transceiver suitable for high speed communication on point to point and multidrop transmission lines. The ADM4168E is designed for balanced transmission lines and complies with TIA/EIA-422-B. The differential driver outputs and receiver inputs feature electrostatic discharge (ESD) circuitry that provides protection up to ?15 kV human body model (HBM) and ?8 kV IEC 61000-4-2 (contact and air discharge). The ADM4168E operates from a single 5 V power supply. Excessive power dissipation caused by bus contention or output shorting is prevented by short-circuit protection circuitry. Short-circuit protection circuits limit the maximum output current to ?150 mA during fault conditions. The receivers of the ADM4168E contain a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The ADM4168E is fully specified over the commercial and industrial temperature ranges and is available in a 16-lead TSSOP package.Applications RS-422 interfaces High data rate motor control Single-ended to differential signal conversion Point to point and multidrop transmission systems

The ADN2817/ADN2818 provide the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 10 Mbps to 2.7 Gbps. The ADN2817/ ADN2818 automatically lock to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are exceeded, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for ?40?C to +85?C ambient temperature, unless otherwise noted.This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, and low power fiber optic receiver.The ADN2817/ADN2818 have many optional features available through an I2C interface. For example, the user can read back the data rate onto which the ADN2817 or ADN2818 is locked, or the user can set the device to lock only to one particular data rate if provisioning of data rates is required. A BERMON circuit provides an estimate of the received bit error rate (BER) without interruption of the data. Alternatively, the user can adjust the data sampling phase to optimize the received BER.The ADN2817/ADN2818 are available in a compact 5 mm ? 5 mm, 32-lead, lead frame chip scale package.ApplicationsSONET OC-1, OC-3, OC-12, OC-48, and all associated FEC rates Fibre Channel, 2? Fibre Channel, GbE, HDTV, and others WDM transponders Regenerators/repeaters Test equipment

The ADN4650/ADN4651/ADN46521 are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 600 Mbps with very low jitter.The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation, to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This technology allows drop-in isolation of an LVDS signal chain.Multiple channel configurations are offered, and the LVDS receivers on the ADN4651/ADN4652 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated, but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout regulator (LDO) can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and are available in a 20-lead, wide body SOIC package with 5 kV rms isolation or a 20-lead SSOP package with 3.75 kV rms isolation.Applications Analog front-end (AFE) isolation Data plane isolation Isolated high speed clock and data links Isolated serial peripheral interface (SPI) over LVDS

The ADN4650/ADN4651/ADN46521 are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 600 Mbps with very low jitter.The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation, to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This technology allows drop-in isolation of an LVDS signal chain.Multiple channel configurations are offered, and the LVDS receivers on the ADN4651/ADN4652 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated, but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout regulator (LDO) can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and are available in a 20-lead, wide body SOIC package with 5 kV rms isolation or a 20-lead SSOP package with 3.75 kV rms isolation.Applications Analog front-end (AFE) isolation Data plane isolation Isolated high speed clock and data links Isolated serial peripheral interface (SPI) over LVDS

The ADN4650/ADN4651/ADN46521 are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 600 Mbps with very low jitter.The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation, to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This technology allows drop-in isolation of an LVDS signal chain.Multiple channel configurations are offered, and the LVDS receivers on the ADN4651/ADN4652 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated, but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout regulator (LDO) can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and are available in a 20-lead, wide body SOIC package with 5 kV rms isolation or a 20-lead SSOP package with 3.75 kV rms isolation.Applications Analog front-end (AFE) isolation Data plane isolation Isolated high speed clock and data links Isolated serial peripheral interface (SPI) over LVDS

The ADN4650/ADN4651/ADN46521 are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 600 Mbps with very low jitter.The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation, to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This technology allows drop-in isolation of an LVDS signal chain.Multiple channel configurations are offered, and the LVDS receivers on the ADN4651/ADN4652 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated, but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout regulator (LDO) can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and are available in a 20-lead, wide body SOIC package with 5 kV rms isolation or a 20-lead SSOP package with 3.75 kV rms isolation.Applications Analog front-end (AFE) isolation Data plane isolation Isolated high speed clock and data links Isolated serial peripheral interface (SPI) over LVDS

The ADN4654/ADN4655/ADN46561? are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 1.1 Gbps with low jitter. The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This integration allows drop-in isolation of an LVDS signal chain.The ADN4654/ADN4655/ADN4656 comprise multiple channel configurations, and the LVDS receivers on the ADN4655 and ADN4656 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout (LDO) regulator can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and come in a 20-lead, wide body SOIC_W package with 5 kV rms isolation or in a 20-lead SSOP package with 3.75 kV rms isolation.Applications Isolated video and imaging data Analog front-end isolation Data plane isolation Isolated high speed clock and data links1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.

The ADN4693E-1 is a multipoint, low voltage differential signaling (M-LVDS) transceiver (driver and receiver pair) that can operate at up to 200 Mbps (100 MHz) nonreturn to zero (NRZ). The receiver detects the bus state with a differential input of as little as ?50 mV over the common-mode voltage range of the device. Electrostatic discharge (ESD) protection of up to ?15 kV is implemented on the bus pins. The ADN4693E-1 is designed to the TIA/EIA-899 standard for M-LVDS and complement TIA/EIA-644 LVDS devices with additional multipoint capabilities.The ADN4693E-1 features a Type 1 receiver with 25 mV of hysteresis so that slow-changing signals or loss of input does not lead to output oscillations.This full-duplex device is available in a compact 16-lead, 4 mm ? 4 mm lead frame chip scale package (LFCSP). The ADN4693E-1 is specified over the -40?C to +120?C junction temperature range.APPLICATIONS Backplane and cable multipoint data transmission Multipoint clock distribution Low power, high speed alternative to shorter RS-485 links Networking and wireless base station infrastructure Grid infrastructure and relay protection systems

The ADN4691E?/?ADN4693E?/ ADN4696E /?ADN4697E aremultipoint, low voltage differential signaling (M-LVDS)transceivers (driver and receiver pairs) that can operate at up to200 Mbps (100 MHz). The receivers detect the bus state with adifferential input of as little as 50 mV over a common-modevoltage range of ?1 V to +3.4 V. ESD protection of up to ?15 kVis implemented on the bus pins. The devices adhere to theTIA/EIA-899 standard for M-LVDS and complement TIA/EIA-644 LVDS devices with additional multipoint capabilities.The ADN4691E / ADN4693E are Type 1 receivers with 25 mV ofhysteresis so that slow-changing signals or loss of input does notlead to output oscillations. The ADN4696E / ADN4697E areType 2 receivers exhibiting an offset threshold, guaranteeing theoutput state when the bus is idle (bus-idle fail-safe) or the inputs areopen (open-circuit fail-safe).The devices are available as half-duplex in an 8-lead SOIC package(the ADN4691E / ADN4696E) or as full-duplex in a 14-leadSOIC package (the ADN4693E / ADN4697E).APPLICATIONS Backplane and cable multipoint data transmission Multipoint clock distribution Low power, high speed alternative to shorter RS-485 links Networking and wireless base station infrastructure

The ADPD188GG is a complete photometric system designed to measure optical signals from ambient light and from synchronous reflected light emitting diode (LED) pulses. Synchronous measurement offers best-in-class rejection of ambient light interference, both dc and ac. The module integrates a highly efficient photometric front end, two LEDs, and two photodiode (PD). All of these items are housed in a custom package that prevents light from going directly from the LED to the photodiode without first entering the subject.The front end of the application specific integrated circuit (ASIC) consists of a control block, a 14-bit analog-to-digital converter (ADC) with a 20-bit burst accumulator, and three flexible, independently configurable LED drivers. The control circuitry includes flexible LED signaling and synchronous detection. The analog front end (AFE) features best-in-class rejection of signal offset and corruption due to modulated interference commonly caused by ambient light. The data output and functional configuration occur over a 1.8 V I2C interface or a serial peripheral interface (SPI) port.Applications Optical heart rate monitoring Reflective PPG measurement CNIBP measurement?