The ADM8641 and ADM8642 are simple voltage detectorssuitable for use in general-purpose applications. The ultralowpower consumption of these devices makes them suitable forpower efficiency sensitive systems, such as battery-poweredportable devices and energy meters.The factory preset detection thresholds from 0.5 V to 4.63 Vwith ?1.2% accuracy over the full temperature range enable thedevices to monitor the node of interest accurately with directcontact. The DIS input lets the user hold the output lowregardless of the state of the input. Not all device options arereleased for sale as standard models. See the Ordering Guidesection for full information.The ADM8641 monitors the voltage using the VCC pin. Theseparate supply pin on the ADM8642 allows it to have a lowerdetection threshold down to 0.5 V.The ADM8641 and ADM8642 are available in a 6-ball, 1.46 mm ?0.96 mm WLCSP. These devices are specified over the ?40?C to+85?C temperature range.Applications Portable/battery-operated equipment Microprocessor systems Energy metering Energy harvesting

The ADM8845 uses charge pump technology to provide thepower required to drive up to six LEDs. The LEDs are used forbacklighting a color LCD display, having regulated constant current for uniform brightness intensity. The main display canhave up to four LEDs, and the sub display can have one or two LEDs. The digital CTRL1 and CTRL2 input control pins controlthe shutdown operation and the brightness of the main and subdisplays.To maximize power efficiency, the charge pump can operate ina 1?, 1.5?, or 2? mode. The charge pump automaticallyswitches between 1?/1.5?/2? modes, based on the input voltage,to maintain sufficient drive for the LED anodes at the highestpower efficiency. Improved brightness matching of the LEDs is achieved by afeedback pin to sense individual LED current with a maximum matching accuracy of 1%.Applications Cellular phones with main and sub displays White LED backlighting Camera flash/strobes and movie lights Micro TFT color displays DSC PDAs

The ADMV1018 is a silicon germanium (SiGe), microwave, upconverter and downconverter optimized for 5G radio designs operating in the 24.0 GHz to 29.5 GHz frequency range.The upconverter offers two modes of frequency translation. The device is capable of direct conversion to RF from differential baseband inphase/quadrature (I/Q) input signals, as well as single-sideband upconversion from complex intermediate frequency (IF) inputs. The differential baseband I/Q input path can be disabled, and modulated, single-ended, complex IF signals from 2 GHz to 9.5 GHz can be fed to the IF path. These signals can then be upconverted to 24.0 GHz to 29.5 GHz while rejecting the unwanted sideband by typically greater than 25 dBc. The serial port interface (SPI) provides adjustment of the quadrature phase to allow optimum sideband rejection. In addition, the SPI interface allows powering down the output envelope detector to reduce power consumption when carrier feedthrough optimization is not necessary.The downconverter offers two modes of frequency translation. The device is capable of direct quadrature demodulation to differential baseband I/Q output signals, as well as image rejection downconversion to a single-ended complex IF output carrier frequency. The I/Q baseband output common-mode voltage is programmable between 0.75 V and 2.15 V. The SPI provides fine adjustment of the quadrature phase to optimize I/Q demodulation performance. Alternatively, the baseband I/Q outputs can be disabled, and the I/Q signals can be passed through an on-chip, active balun to provide two, single-ended, complex IF outputs between 2 GHz and 9.5 GHz. When the device is used as an image rejecting downconverter, the unwanted image term is typically rejected to greater than 25 dBc. The ADMV1018 offers a square law power detector to allow monitoring of the power levels at the mixer inputs. The detector output provides closed-loop control of the RF digital step attenuator (DSA) via an external automatic gain control (AGC) loop.The ADMV1018 upconverter and downconverter is housed in a compact, thermally enhanced, 9 mm ? 8 mm, land grid array (LGA) package. This LGA package enables the ability to heat-sink the ADMV1018 from the top of the package for the most efficient thermal heatsinking. The ADMV1018 operates over the ?40?C to +95?C case temperature range.Throughout the figures in the data sheet, Rx means receiver and Tx means transmitter.APPLICATIONS5G applicationsPoint to point microwave radiosRadar and electronic warfare systemsInstrumentation and automatic test equipment (ATE)

The ADMV1139 is an silicon on isolator (SOI), microwave, upconverter and downconverter optimized for 5G radio designs operating in the 37 GHz to 48.2 GHz frequency range.Both upconverters and downconverters offer two modes of frequency translation. One mode is conversion from and/or to complex intermediate frequency (IF) signals, which then pass through an on-chip 90? IF hybrid, known as IF mode.The other mode is a direct conversion from and/or to single-ended or differential baseband inphase/quadrature (I/Q) inputs and outputs, known as baseband mode. The I/Q baseband output common-mode voltage is programmable between 0 V and 1.5 V. The SPI provides fine adjustment of the quadrature phase to optimize I/Q demodulation performance.When the device is used as an image rejecting downconverter, the unwanted image term is typically rejected to 26 dBc, before calibration. The ADMV1139 offers a square law power detector to allow monitoring of the power levels at the mixer inputs of the downconverter.The RF receive input, RF transmit output, and local oscillator (LO) interface are all single-ended and matched to 50 ?. The on-chip RF switch provides the option to combine the transmit and receive RF ports together for time division duplex (TDD) applications.The serial port interface (SPI) provides adjustment of the quadrature phase to allow optimum sideband rejection. In addition, the SPI allows powering down the output envelope detector to reduce power consumption when carrier feedthrough optimization is not necessary.The ADMV1139 upconverter and downconverter is housed in a compact, thermally enhanced, 6 mm ? 6.5 mm, ball grid array (BGA) package. This BGA package enables the ability to heat sink the ADMV1139 from the top of the package for the most efficient thermal heat sinking. The ADMV1139 operates over the ?40?C to +95?C TC range.APPLICATIONSMillimeter-wave 5G applicationsPoint to point microwave radiosRadar and electronic warfare systemsInstrumentation and automatic test equipment (ATE)

The ADMV1139 is an silicon on isolator (SOI), microwave, upconverter and downconverter optimized for 5G radio designs operating in the 37 GHz to 48.2 GHz frequency range.Both upconverters and downconverters offer two modes of frequency translation. One mode is conversion from and/or to complex intermediate frequency (IF) signals, which then pass through an on-chip 90? IF hybrid, known as IF mode.The other mode is a direct conversion from and/or to single-ended or differential baseband inphase/quadrature (I/Q) inputs and outputs, known as baseband mode. The I/Q baseband output common-mode voltage is programmable between 0 V and 1.5 V. The SPI provides fine adjustment of the quadrature phase to optimize I/Q demodulation performance.When the device is used as an image rejecting downconverter, the unwanted image term is typically rejected to 26 dBc, before calibration. The ADMV1139 offers a square law power detector to allow monitoring of the power levels at the mixer inputs of the downconverter.The RF receive input, RF transmit output, and local oscillator (LO) interface are all single-ended and matched to 50 ?. The on-chip RF switch provides the option to combine the transmit and receive RF ports together for time division duplex (TDD) applications.The serial port interface (SPI) provides adjustment of the quadrature phase to allow optimum sideband rejection. In addition, the SPI allows powering down the output envelope detector to reduce power consumption when carrier feedthrough optimization is not necessary.The ADMV1139 upconverter and downconverter is housed in a compact, thermally enhanced, 6 mm ? 6.5 mm, ball grid array (BGA) package. This BGA package enables the ability to heat sink the ADMV1139 from the top of the package for the most efficient thermal heat sinking. The ADMV1139 operates over the ?40?C to +95?C TC range.APPLICATIONSMillimeter-wave 5G applicationsPoint to point microwave radiosRadar and electronic warfare systemsInstrumentation and automatic test equipment (ATE)

The ADMV4540 is a highly integrated quadrature demodulator with integrated synthesizer ideally suited for next generation K band satellite communication.The RF front end of the ADMV4540 consists of two low noise amplifier (LNA) paths, each with an optimal cascaded, 5 dB, double sideband noise figure at maximum gain, while minimizing external components. The dual paths allow support for antenna polarization. Selection of the LNA path can be done through the SPI.The LNA output is then downconverted to baseband using an inphase and quadrature (I/Q) mixer. The I/Q mixer output is then fed into fully differential low noise and low distortion programmable filters and variable gain amplifiers (VGAs). Each channel is capable of rejecting large, out of band interferers while reliably boosting the wanted signal, thus reducing the bandwidth and resolution requirements on the analog-to-digital converters (ADCs) of the system. The excellent matching between channels and their highspurious-free dynamic range (SFDR) over all gain and bandwidth settings make the ADMV4540 ideal for satellite communication systems with dense constellations, multiple carriers, and nearby interferers.The three filter corners of 125 MHz, 250 MHz, and 500 MHz are all programmable via a serial peripheral interface (SPI). The filters provide a sixth-order Butterworth response with ?3 dB corner frequencies of 141 MHz, 282 MHz, and 565 MHz. For operation beyond 565 MHz, the filter can be disabled and completely bypassed, thereby extending the ?3 dB bandwidth up to 900 MHz.The high dynamic range baseband output amplifiers of the ADMV4540 provide an overall nominal conversion gain of 57 dB. The three baseband voltage variable attenuator (VVA) pins (VCTRL_BBVVAx) of the ADMV4540 can be used for automatic gain control (AGC), giving the ADMV4540 a wide RF input dynamic range.This feature rich device contains an integrated fractional-N phase-locked loop (PLL) and a low phase noise voltage controlled oscillator (VCO) that generates the necessary on-chip local oscillator (LO) signal for the two double balanced I/Q mixers, eliminating the need for external frequency synthesis. The VCO utilizes an internal automatic calibration routine that allows the PLL to select the necessary settings and lock.The reference input (REFIN) to the PLL of the ADMV4540 employs a differentially excited crystal oscillator at 50 MHz. Alternatively, the REFIN can be driven by an external single-ended frequency reference up to 100 MHz. The phase frequency detector (PFD) comparison frequency operates up to 100 MHz, which allows for continuous LO coverage from 17 GHz to 21.5 GHz in extremely fine steps.The ADMV4540 operates on a 3.3 V supply with less than 3.2 W of total power dissipation. It is available in a 48-terminal, RoHS compliant, 7 mm ? 7 mm LGA package with an exposed paddle. The ADMV4540 can operate over the ?40? to +85? temperature range on a + 3.3 V power supply.APPLICATIONSSatellite communications

The ADMV4801 is a silicon germanium (SiGe), 24 GHz to 29.5 GHz, mmW, 5G beamformer. This RF IC is highly integrated and contains 16 independent transmit and receive channels. In transmit mode, the RFC input signal is split using 1:16 power splitters and passes through the 16 independent transmit channels. In receive mode, input signals pass through the 16 independent channels and are combined with 16:1 combiners to the RFC pin. In transmit mode, each channel includes a vector modulator (VM) to control phase and two digital variable gain amplifiers (DVGAs) to control amplitude. In receive mode, each channel includes a VM to control phase and a DVGA to control amplitude. The VM provides a full 360? phase adjustment range in either transmit or receive mode, providing 6 bits of resolution for 5.625? phase steps. The total DVGA dynamic range adjustment range in transmit mode is 34 dB, providing 6 bits of resolution, resulting in 0.5 dB amplitude steps, and 5 bits of resolution, resulting in 1 dB amplitude steps. In receive model the total dynamic range is 17 dB providing, 6 bits of resolution, resulting in 0.5 dB amplitude steps. The DVGAs provide a flat phase response across the full gain range. The transmit channels contain individual power detectors to provide the ability to detect and calibrate each channel gain, as well as channel to channel gain mismatch. The ADMV4801 RF ports can be connected directly to a patch antenna to create a dual polarization, mmW, 5G subarray.The programming of the ADMV4801 can be accomplished using the 3-wire or 4-wire serial port interface (SPI). An integrated, onchip low dropout regulator (LDO) generates the 1.8 V supply for the SPI circuitry to reduce the number of required supply domains. Various SPI modes are available to enable fast startup and control during normal operation. The amplitude and phase for each channel can be set individually, or multiple channels can be programmed simultaneously using the on-chip memory for beamforming. The on-chip memory can store up to 256 beam positions, which can be allocated for either transmit or receive mode. A dedicated load pin provides synchronization of all devices in the same array. A transmit and receive mode control pin is provided for fast switching between transmit and receive mode.The ADMV4801 is featured in a compact, thermally enhanced, 10 mm ? 10 mm, RoHS compliant land grid array (LGA) package. The ADMV4801 operates over the ?40?C to +95?C case temperature range. This LGA package enables the ability to heat-sink the ADMV4801 from the topside of the package for the most efficient thermal heat-sinking and to allow flexible antenna placement on the opposite side of the printed circuit board (PCB).Throughout the figures in the data sheet, Tx means transmit (or transmitter) and Rx means receive (or receiver).Additional digital details of ADMV4801 are available in AN-2021 Application Note, ADMV4801 SPI Application Note. Contact Analog Devices at mmWave5G@analog.com.APPLICATIONS5G applicationsBroadband communicationTest and measurementAerospace and defense

The ADMV4828 is a silicon on insulator (SOI), 24.0 GHz to 29.5 GHz, mmW 5G beamformer. The RF integrated circuit (RFIC) is highly integrated and contains 16 independent transmit and receive channels. The ADMV4828 supports eight horizontal and eight vertical polarized antennas via independent RFV and RFH input/outputs.In transmit mode, both the RFV input and RFH input signals feed into separate amplifiers. Each path after the amplifiers splits into eight independent channels via the 1:8 power splitters. In receive mode, input signals pass through either the vertical or horizontal receive channels and combine via two independent 8:1 combiners to the common RFV pin or RFH pin. In either mode, each transmit and receive channel includes a vector modulator (VM) to control the phase, and two digital variable gain amplifiers (DVGAs) to control the amplitude. The VM provides a full 360? phase adjustment range in either transmit or receive mode to provide 6 bits of resolution for 5.625? phase steps. A phase step policy for the transmit and receive VM is provided to ensure optimum phase step performance. The total DVGA dynamic range in transmit mode is 34.5, which provides 6 bits of resolution that results in 0.5 dB amplitude steps and 5 bits of resolution that results in 1 dB amplitude steps. In receive mode, the total dynamic range is 28 dB, which provides 5 bits of resolution that results in 0.5 dB amplitude steps and 5 bits of resolution that results in 1 dB amplitude steps. The DVGAs provide a flat phase response across the full gain range. A gain policy for DVGA1 and DVGA2 is provided in the AN-2074 Application Note, ADMV4828 Application Note to ensure optimized performance across the attenuation range with 0.5 dB step resolution from 0 dB to 34.5 dB attenuation for transmit mode and 0.5 dB step resolution from 0 dB to 28 dB attenuation for receive mode. The transmit channels contain individual transmit power detectors to detect either modulated or continuous wave signals to calibrate for each channel gain as well as channel to channel gain mismatch. Each receive channel contains an RF power overload circuit (receive channel overload detection circuit) to prevent potential damage to the device as a result of blocker instances. The ADMV4828 RF ports can be connected directly to a patch antenna to create a dual polarization mmW 5G subarray.The ADMV4828 can be programmed using a 3-wire or 4-wire serial port interface (SPI). An integrated, on-chip low dropout (LDO) voltage regulator generates the 1.0 V supply for the SPI circuitry to reduce the number of supply domains required. Various SPI modes are available to enable fast startup and control during normal operation. The amplitude and phase for each channel can be set individually or multiple channels can be programmed simultaneously using the on-chip memory for beamforming. The on-chip memory can store up to 2048 beam positions that can be allocated for either transmit mode or receive mode for the horizontal channels and vertical channels. On-chip nonvolatile memory (NVM) is used to store the calibrated gain and phase offset coefficients and the reference values for each individual channel from the factory. These values are used to perform channel to channel or chip to chip calibration. In addition, four address pins (CHIP_ADDx) allow independent SPI control of up to 16 devices on the same serial lines. To control multiple devices via the same serial lines with the same instructions, activate broadcast mode via the external enable pin (BR_EN). Dedicated horizontal and vertical polarization load pins (LOAD_V and LOAD_H) provide the synchronization of all devices in the same array. A horizontal and vertical polarization transmit mode and receive mode control pin (TRX_H or TRX_V) is provided for fast switching between transmit mode and receive mode.The ADMV4828 comes in a compact, 304-ball, 10 mm ? 8.5 mm chip scale package ball grid array (CSP_BGA). The ADMV4828 operates over the ?40?C to +95?C case temperature (TC) range. This CSP_BGA package enables the ability to heatsink the ADMV4828 from the topside of the package for the most efficient thermal heatsinking and to allow flexible antenna placement on the opposite side of the printed circuit board (PCB).APPLICATIONSmmW 5G applicationBroadband communication

The ADMV7320 is a fully integrated system in package (SiP),in phase/quadrature (I/Q) upconverter that operates betweenan intermediate frequency (IF) input range of dc and 2 GHzand a radio frequency (RF) output range of 81 GHz and 86 GHz.The device uses an image rejection mixer that is driven by a 6?local oscillator (LO) multiplier. The mixer RF output is followedby a variable gain amplifier (VGA) and a power amplifier (PA),providing a conversion gain of 33 dB typical. Differential I andQ mixer inputs are provided and can be driven with differentialI and Q baseband waveforms for direct conversion applications.Alternatively, the inputs can be driven using an external 90? hybridand two external 180 hybrids for single-ended applications.The ADMV7320 comes in a fully integrated, surface-mount,50-terminal, 16.00 mm ? 14.00 mm, chip array small outline nolead cavity (LGA_CAV) package. The ADMV7320 operatesover the ?40?C to +85?C temperature range.APPLICATIONS E-band communication systems High capacity wireless backhauls Test and measurement Aerospace and defense

The ADN2830 provides closed loop control of the average optical power of a continuous wave (CW) laser diode (LD) after initial factory setup. The control loop adjusts the laser IBIAS to maintain a constant Back Facet Monitor Photo Diode (MPD) current and hence a constant laser optical power. The external PSET resistor is adjusted during factory set up to set the desired optical power. RPSET is set at 1.23/IAV, where IAVis the MPD current corresponding to the desired optical power. Programmable alarms are provided for laser fail (end of life) and laser degrade (impending fail).The ADN2830 operates from a single power +5 V supply. It is available in 5mm ? 5mm LFCSP-32 Lead Frame Chip Scale.