The HMC741 is an InGaP Heterojunction Bipolar Transistor (HBT) Gain Block MMIC SMT amplifier covering 0.05 to 3 GHz. Packaged in an industry standard SOT89, the amplifier can be used as a cascadable 50 Ohm RF or IF gain stage as well as a PA or LO driver with up to +18.5 dBm output power. The HMC741 offers 20 dB of gain with a +42 dBm output IP3 at 200 MHz, and can operate directly from a +5V supply. The HMC741 exhibits excellent gain and output power stability over temperature, while requiring a minimal number of external bias components.Applications Cellular/3G & WiMAX/4G Fixed Wireless & WLAN CATV, Cable Modem & DBS Microwave Radio & Test Equipment IF & RF Applications

The HMC794LP3E is a SiGe BiCMOS low noise programmable frequency divider in a 3 ? 3mm leadless surface mount package. The circuit can be programmed to divide from N = 1 to N = 4 in the 200 MHz to 2 GHz input frequency range. The high level output power (up to 10 dBm) with a very low SSB phase noise and 50% duty cycle makes this device ideal for low noise clock generation, LO generation and LO drive applications. Configurable bias controls allow power minimization of up to 20%.APPLICATIONS LO Generation with Low Noise Floor Clock Generators Mixer LO Drive Military Applications Test Equipment Sensors

The HMC701LP6CE is a SiGe BiCMOS fractional-N frequency synthesizer. The synthesizer includes a 8GHz 16-bit RF N-Divider, a 24-bit delta-sigma modulator, a very low noise digital phase frequency detector (PFD), and a precision controlled charge pump. In addition the synthesizer supports an external step tuned VCO.The fractional synthesizer features an advanced delta-sigma modulator design that allows ultra-fine frequency step sizes. The synthesizer features the ability to alter both the phase-frequency detector (PFD) gain and the cycle slipping characteristics of the PFD. This feature can reduce the time to arrive at the new frequency by 50% vs. conventional PFDs. Ultra low in-close phase noise also allows wider loop bandwidths for faster frequency hopping.The synthesizer contains a built-in linear sweeper function, which allows it to perform frequency chirps with a wide variety of sweep times, polarities and dwells, all with an external or automatic sweep trigger.A General Purpose Output (GPO) bus supports the use of multiple VCOs. In addition the synthesizer has a number of auxiliary clock generation modes that can be accessed via the GPO.Applications Base Stations for Mobile Radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs, WiMax Communications Test Equipment CATV Equipment FMCW Sensors Automotive Radar Phased-Array Systems

The HMC851LC3C is a XOR/XNOR gate function designed to support data transmission rates of up to 28 Gbps, and clock frequencies as high as 28 GHz. The HMC851LC3C also features an output level control pin, VR, which allows for loss compensation or for signal level optimization.All input signals to the HMC851LC3C are terminated with 50 Ohms to ground on-chip, and may be either AC or DC coupled. The differential outputs of the HMC851LC3C may be either AC or DC coupled. Outputs can be connected directly to a 50 Ohm to ground terminated system, while DC blocking capacitors may be used if the terminating system is 50 Ohms to a nonground DC voltage. The HMC851LC3C operates from a single -3.3V DC supply, and is available in a ceramic RoHS compliant 3x3 mm SMT package.APPLICATIONS RF ATE Applications Broadband Test & Measurement Serial Data Transmission?up to 28 Gbps

The HMC789ST89E is a high linearity GaAs InGaP HBT gain block MMIC operating from 0.7 to 2.8 GHz and packaged in an industry standard SOT89 package. Utilizing a minimum number of external components and a single +5V supply, the amplifier output IP3 can be optimized to +45 dBm. The high output IP3 and high gain make the HMC789ST89E ideal for use in PA driver & pre-driver applications in Cellular/4G and Fixed Wireless.Applications Cellular/4G Fixed Wireless & WLAN CATV, Cable Modem & DBS Microwave Radio & Test Equipment IF & RF Applications

The HMC789ST89E is a high linearity GaAs InGaP HBT gain block MMIC operating from 0.7 to 2.8 GHz and packaged in an industry standard SOT89 package. Utilizing a minimum number of external components and a single +5V supply, the amplifier output IP3 can be optimized to +45 dBm. The high output IP3 and high gain make the HMC789ST89E ideal for use in PA driver & pre-driver applications in Cellular/4G and Fixed Wireless.Applications Cellular/4G Fixed Wireless & WLAN CATV, Cable Modem & DBS Microwave Radio & Test Equipment IF & RF Applications

The HMC855LC5 is a 1:4 demultiplexer designed for data deserialization up to 28 Gbps. The device uses both rising and falling edges of the half-rate clock to sample the input data in sequence, D0-D3 and latches the data onto the differential outputs. A quarter-rate clock output generated on chip can be used to clock the data into other devices. The demux is DC coupled supporting broadband operation.All clock and data inputs to the HMC855LC5 are CML and terminated on-chip with 50 Ohms to the positive supply, GND, and may be DC or AC coupled. The differential outputs are source terminated to 50 Ohms and may also be AC or DC coupled. Outputs can be connected directly to a 50 Ohm ground terminated system, or drive devices with CML logic input. The HMC855LC5 also features an output level control pin, VR, which allows for loss compensation or signal level optimization. The HMC855LC5 operates from a single -3.3V supply and is available in RoHS compliant 5x5 mm SMT package.APPLICATIONS SONET OC-192 Broadband Test & Measurement Serial Data Transmission?up to 28 Gbps FPGA Interfacing

The HMC857LC5 is a 2?2 Crosspoint Switch designed to support data transmission rates of up to 14 Gbps and selector port operation up to 14 GHz. The selector routes the differential inputs to either one or both of the desired outputs upon assertion of the appropriately selected port. The HMC857LC5 also features an output level control pin, VR, which allows for loss compensation or for signal level optimization.All single-ended input signals to the HMC857LC5 are terminated with 50 Ohms to ground on-chip, and may be either AC or DC coupled. The outputs of the HMC857LC5 may be operated either differentially or single ended. Outputs can be connected directly to a 50 ??terminated system, while DC blocking capacitors may be used if the terminating system is 50 Ohms to a non-ground DC voltage. The HMC857LC5 operates from a single -3.3V DC supply and is available in a ceramic RoHS compliant 5 נ5 mm SMT package.APPLICATIONS SONET OC-192 and 10 GbE 16G Fiber Channel Network & Storage Dual 2:1 Selector 1:2 Fanout with Input Mux

The HMC820LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) Frequency Synthesizer with an Integrated Voltage Controlled Oscillator (VCO). The synthesizer consists of an integrated low noise VCO with a triband output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider.The fractional synthesizer features an advanced delta-sigma modulator design that allows both ultra-fine step sizes and low spurious products. The phase detector (PD) features cycle slip prevention (CSP) technology to allow faster frequency hopping times. Ultra low in-close phase noise and low spurious also allows wider loop bandwidths for faster frequency hopping and low micro-phonics.For theory of operation and register map refer to the 'PLLs with Integrated VCO - RF VCOs' Operating Guide.Applications Cellular/4G Infrastructure Repeaters and Femtocells Communications Test Equipment CATV Equipment Phased Array Applications DDS Replacement? Very High Data Rate Radios

The HMC821LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) Frequency Synthesizer with an Integrated Voltage Controlled Oscillator (VCO). The synthesizer consists of an integrated low noise VCO with a triband output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider.The fractional synthesizer features an advanced delta-sigma modulator design that allows both ultra-fine step sizes and low spurious products. The phase detector (PD) features cycle slip prevention (CSP) technology to allow faster frequency hopping times. Ultra low in-close phase noise and low spurious also allows wider loop bandwidths for faster frequency hopping and low micro-phonics.For theory of operation and register map refer to the 'PLLs with Integrated VCO - RF VCOs' Operating Guide.Applications Cellular/4G Infrastructure Repeaters and Femtocells Communications Test Equipment CATV Equipment Phased Array Applications DDS Replacement? Very High Data Rate Radios