Demonstration circuit 950A-A is an isolated, 30W multi-output, synchronous flyback converter in 1/8 brick format featuring the LT3825. Output voltage sensing is implemented without the use of opto-coupler, by sensing the voltage across a primary side auxiliary winding. A load compensation circuit is used to compensate for voltage drops caused by load currents. DC950A-A has input voltage range 36V-72V and features the LT3825. Demonstration circuit 950A uses a transformer design with tapped secondary winding, to achieve higher efficiency and better cross regulation than is possible with a transformer that uses a separate winding for each output.

Demonstration circuit 950A-B is an isolated, 30W multi-output, synchronous flyback converter in 1/8 brick format featuring the LT3837. Output voltage sensing is implemented without the use of opto-coupler, by sensing the voltage across a primary side auxiliary winding. A load compensation circuit is used to compensate for voltage drops caused by load currents. DC950A-B has input voltage range 9V-36V. Demonstration circuit 950A uses a transformer design with tapped secondary winding, to achieve higher efficiency and better cross regulation than is possible with a transformer that uses a separate winding for each output.

The LT6402-20 is a low distortion, low noise differential ampli?er/ADC driver for use in applications from DC to 300MHz. The LT6402-20 has been designed for ease of use, with minimal support circuitry required. Exceptionally low input-referred noise and low distortion (with either single-ended or differential inputs) make the LT6402-20 an excellent solution for driving high speed 12-bit and 14-bit ADCs. In addition to the normal unfiltered outputs (+OUT and ?OUT), the LT6402-20 has a built-in 75MHz differential low pass filter and an additional pair of filtered outputs (+OUTFILTERED, ?OUTFILTERED) to reduce external filtering components when driving high speed ADCs. The output common mode voltage is easily set via the VOCM pin, eliminating an output transformer or AC-coupling capacitors in many applications.The LT6402-20 is designed to meet the demanding requirements of communications transceiver applications. It can be used as a differential ADC driver, a general-purpose differential gain block, or in other applications requiring differential drive. The LT6402-20 can be used in data acquisition systems required to function at frequencies down to DC.The LT6402-20 operates on a 5V supply and consumes 30mA. It comes in a compact 16-lead 3mm ? 3mm QFN package and operates over a ?40?C to 85?C temperature range.Applications Differential ADC Driver for: Imaging Communications Differential Driver/Receiver Single Ended to Differential Conversion Differential to Single Ended Conversion Level Shifting IF Sampling Receivers SAW Filter Interfacing/Buffering

Demonstration circuit 957 is a wide input range, 3.3V / 3.0A output synchronous buck-boost controller featuring the LTC3785. This circuit was designed to demonstrate the high levels of performance, efficiency, and small solution size attainable using this part in a buck-boost power supply. It operates at 500kHz and produces a regulated 3.3V, 3.0A output from an input voltage range of 2.7 to 10V. It is suitable for portable applications, and has a footprint area that is 0.36 square inches. Synchronous rectification helps to attain efficiency up to 96%, depending on line and load. The LTC3785 provides current limit and shutdown disconnect. It offers Burst Mode® operation for high efficiency at light loads.

The LT1994 is a high precision, very low noise, low distortion, fully differential input/output amplifier optimized for 3V, single supply operation. The LT1994?s output common mode voltage is independent of the input common mode voltage, and is adjustable by applying a voltage on the VOCM pin. A separate internal common mode feedback path provides accurate output phase balancing and reduced even-order harmonics. This makes the LT1994 ideal for level shifting ground referenced signals for driving differential input, single supply ADCs.The LT1994 output can swing rail-to-rail and is capable of sourcing and sinking up to 85mA. In addition to the low distortion characteristics, the LT1994 has a low input referred voltage noise of 3nV/?Hz. This part maintains its performance for supply voltages as low as 2.375V. It draws only 13.3mA of supply current and has a hardware shutdown feature that reduces current consumption to 225?A.The LT1994 is available in an 8-pin MSOP or 8-pin DFN package.Applications Differential Input A/D Converter Driver Single-Ended to Differential Conversion Differential Amplifier cation with Common Mode Translation Rail-to-Rail Differential Line Driver/Receiver Low Voltage, Low Noise, Differential Signal Processing

The ADM1073 is a full-feature, negative voltage, hot swap controller that allows boards to be safely inserted and removed from a live ?48 V backplane. The part provides precise and robust current limiting, and protection against both transient and nontransient short circuits in overvoltage and undervoltage conditions. The ADM1073 can operate from a negative voltage of ?18 V to ?80 V and can tolerate transient voltages of up to ?200 V.Inrush current is limited to a programmable value by control-ling the gate drive of an external N-channel FET. The maximum current limit is set by the choice of the sense resistor, RSENSE.A built-in soft start function allows control of the inrush current profile by an external capacitor on the soft start (SS) pin.An external capacitor on the TIMER pin determines the time for which the FET gate is controlled to be high when maximum inrush current flows. The ADM1073 employs a limited consecutive retry scheme, whereby, if the load capacitance is not fully charged within one attempt, the FET gate is pulled low and retries after a cooling period.APPLICATIONS Central office switching Telecommunication and data communication equipment ?48 V distributed power systems Negative power supply control High availability servers ?48 V power supply modules Disk arrays

The ADM1185 is an integrated, 4-channel, voltage monitoring and sequencing device. A 2.7 V to 5.5 V power supply is required on the VCC pin to power the device.Four precision comparators monitor four voltage rails. All comparators have a 0.6 V reference with a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the trip points for the monitored supply rails.A digital core interprets the status of the comparator outputs.Internal time delays can be used for sequencing the startup of subsequent power supplies enabled by the outputs. Supplies falling out of range are also detected and, as a result, appropriate outputs are disabled.The ADM1185 has four open-drain outputs. In a typical configuration, OUT1 to OUT3 are used to enable power supplies, while PWRGD is a common power-good output, indicating the status of all monitored supplies.The ADM1185 is available in a 10-lead mini small outline package (MSOP).APPLICATIONS Monitor and alarm functions Power supply sequencing Telecommunication and data communication equipment PCs/servers

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1260 Super Sequencer? is a configurable supervisory/sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems.A high speed interchip bus (ICB) allows multiple devices to be easily linked together. It is possible to create a system capable of sequencing up to 40 supplies and monitoring up to 37 supplies. Using the ADI Power Studio? software, the operation of the ICB is transparent to the user, making multiple devices appear to operate as a single virtual sequencer.In addition to these functions, the ADM1260 integrates a 12-bit analog-to-digital converter (ADC) and six 8-bit voltage output digital-to-analog converters (DACs). Use the ADC and the DACs to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or the reference of a dc-to-dc converter using the DAC outputs.Supply margining can be performed with a minimum of external components. The margining loop can be used for in-circuit testing of a board during production (for example, to verify board functionality at ?5% of nominal supplies), or it can be used dynamically to accurately control the output voltage of a dc-to-dc converter.The device also provides up to 10 programmable inputs for monitoring undervoltage faults, overvoltage faults, or out of window faults on up to 10 supplies. In addition, 10 programmable outputs can be used as logic enables. Six of these programmable outputs can also provide an output of up to 12 V for driving the gate of an N-FET that can be placed in the path of a supply.The logical core of the device is a sequencing engine (SE). This state machine-based construction provides up to 61 different states. This design enables very flexible sequencing of the outputs, based on the condition of the inputs.A block of nonvolatile EEPROM is available that can be used to store user defined information and can also be used to hold a number of fault records that are written by the sequencing engine, as defined by the user when a particular fault or sequence occurs.The device is controlled via configuration data that can be programmed into an EEPROM. The entire configuration can be programmed using an intuitive graphical user interface (GUI)-based software package provided by Analog Devices, Inc., the ADI Power Studio software.Applications Central office systems Servers/routers Multivoltage system line cards Digital signal processor (DSP)/field programmable gate array (FPGA) supply sequencing In-circuit testing of margined supplies