The LTC4441/LTC4441-1 is an N-channel MOSFET gate driver that can supply up to 6A of peak output current. The chip is designed to operate with a supply voltage of up to 25V and has an adjustable linear regulator for the gate drive. The gate drive voltage can be programmed between 5V and 8V.The LTC4441/LTC4441-1 features a logic threshold driver input. This input can be driven below ground or above the driver supply. A dual function control input is provided to disable the driver or to force the chip into shutdown mode with <12?A of supply current. Undervoltage lockout and overtemperature protection circuits will disable the driver output when activated. The LTC4441 also comes with an open-drain output that provides adjustable leading edge blanking to prevent ringing when sensing the source current of the power MOSFETs.The LTC4441 is available in a thermally enhanced 10-lead MSOP package. The LTC4441-1 is the SO-8 version without the blanking function.Protected by U.S. Patents including 6677210.Applications Power Supplies Motor/Relay Control Line Drivers Charge Pumps

DC851A-N: Demo Board for the LTC2293 Dual 12-Bit, 65Msps Low Power 3V ADCs.

DC851A-S: Demo Board for the LTC2284 Dual 14-Bit, 105Msps Low Power 3V ADC.

The LTC2284 is a 14-bit 105Msps, low power dual 3V A/D converter designed for digitizing high frequency, wide dynamic range signals. The LTC2284 is perfect for demanding imaging and communications applications with AC performance that includes 72.4dB SNR and 85dB SFDR for signals at the Nyquist frequency.Typical DC specs include ?1.5LSB INL, ?0.6LSB DNL. The transition noise is a low 1.3LSBRMS.A single 3V supply allows low power operation. A separate output supply allows the outputs to drive 0.5V to 3.6V logic.A single-ended CLK input controls converter operation. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.Applications Wireless and Wired Broadband Communication Imaging Systems Spectral Analysis Portable Instrumentation

DC851A-V: Demo Board for the LTC2282 Dual 12-Bit, 105Msps Low Power 3V ADC

DC851A-W: Demo Board for the LTC2280 Dual 10-Bit, 105Msps Low Noise 3V ADC.

The LTC2217 is a 105Msps sampling 16-bit A/D converter designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 400MHz. The input range of the ADC is ?xed at 2.75VP-P.The LTC2217 is perfect for demanding communications applications, with AC performance that includes 81.3dBFS Noise Floor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 85fsRMS allows undersampling of high input frequencies while maintaining excellent noise performance. Maximum DC speci?cations include ?3.5LSB INL, ?1LSB DNL (no missing codes). The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V. The ENC+ and ENC? inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.Applications Telecommunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems ATE

DC854D-F: Demo Board for the LTC2217 16-Bit, 105Msps Low Noise ADC.

DC854D-H: Demo Board for the LTC2216 16-Bit, 80Msps Low Noise ADC.

The LTC2216/LTC2215 are 80Msps/65Msps sampling 16- bit A/D converters designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 400MHz. The input range of the ADC is ?xed at 2.75VP-P.The LTC2216/LTC2215 are perfect for demanding communications applications, with AC performance that includes 81.5dBFS noise ?oor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 85fsRMS allows undersampling of high input frequencies while maintaining excellent noise performance. Maximum DC specs include ?3.5LSB INL, ?1LSB DNL (no missing codes). The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V. The ENC+ and ENC? inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.Applications Telecommunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems ATE