LTC6952 Demo Board | Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B Support

Analog Devices Inc.

The LTC6952 is a high performance, ultralow jitter,JESD204B/C clock generation and distribution IC. Itincludes a Phase Locked Loop (PLL) core, consisting ofa reference divider, phase-frequency detector (PFD) witha phase-lock indicator, ultralow noise charge pump andinteger feedback divider. The LTC6952?s eleven outputscan be configured as up to five JESD204B/C subclass1 device clock/SYSREF pairs plus one general purposeoutput, or simply eleven general purpose clock outputs fornon-JESD204B/C applications. Each output has its ownindividually programmable frequency divider and outputdriver. All outputs can also be synchronized and set toprecise phase alignment using individual coarse half-cycledigital delays and fine analog time delays.For applications requiring more than eleven total outputs,multiple LTC6952s can be connected together using theEZSync or ParallelSync synchronization protocols.Applications High Performance Data Converter Clocking Wireless Infrastructure Test and Measurement

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