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SN74HCS244RKSR

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Price
RoHS Y Y Y Y Y Y Y Not Compliant Not Compliant Y
Lead Status Y Y Y Y Y Y Y See ti.com See ti.com Y
Analog input BW(MHz) 6000
Architecture Folding Interpolating CMOS CMOS CMOS
ENOB(bit) 8.5
Features Ultra High Speed Adjustable current limit,Dynamic Voltage Scaling,Enable,Frequency synchronization,I2C,Light Load Efficiency,Multiple Outputs,PMBus,Phase Interleaving,Power good,Pre-Bias Start-Up,Remote Sense,SVID,Synchronous Rectification,UVLO adjustable,Voltage Margining Adaptive/Dynamic Voltage Scaling,Enable,Forced PWM,I2C/PMBus,Light load efficiency,Output discharge,Over Current Protection,Power good,Soft Start Fixed,Synchronous Rectification,UVLO fixed,VID Interface Adaptive/Dynamic Voltage Scaling,Enable,Forced PWM,I2C/PMBus,Light load efficiency,Output discharge,Over Current Protection,Power good,Soft Start Fixed,Synchronous Rectification,UVLO fixed,VID Interface 2 Dual 1 EMI Hardened,MUX Friendly,Small Size EMI Hardened,MUX Friendly,Shutdown EMI Hardened,MUX Friendly,Shutdown Balanced outputs,High speed (tpd 10-50ns),Input clamp diode
Input buffer Yes
Interface type JESD204B,JESD204C
Number of input channels 1
Operating temperature range(C) -40 -40 -40 -40 -40 -40 -40 to 125 -40 to 125 -40 to 125 -40
Package area(mm^2) 100 25 3.75 3.75 36 36 11.25
Package size (L x W)(mm) 10 x 10 5 x 5 2.5 x 1.5 2.5 x 1.5 6 x 6 6 x 6 4.5 x 2.5
Package type FCCSP WQFN VQFN-HR VQFN-HR VQFN VQFN VQFN
Peak-to-peak input voltage range(V) 0.8
Pin count 144.0 40.0 9.0 9.0 40.0 40.0 20
Power consumption(typ)(mW) 830
Rating Catalog Catalog Catalog Catalog Catalog Catalog Catalog Catalog Catalog Catalog
Resolution(Bits) 9
SFDR(dB) 64
SNR(dB) 53.5
Sample rate(max)(Msps) 800
TI.com inventory 2048 1089 129940 230396 1049 147546 11027 13266 13266 396938
Approx. price(US$) 19 | 1ku 5.744 | 1ku .75 | 1ku .9 | 1ku 5.777 | 1ku 6.335 | 1ku .644 | 1ku .429 | 1ku .429 | 1ku .139 | 1ku
Control mode D-CAP+ DCS-Control DCS-Control
Iout(max)(A) 765 4 6
Iq(typ)(mA) 50 0.004 0.004
Maximum package height(mm) 0.8 1.0 1.0
Number of phases 8
Regulated outputs(#) 2 1 1
Switching frequency(max)(kHz) 1500 2400 2400
Switching frequency(min)(kHz) 300 2400 2400
TI functional safety category
Type Controller Converter Converter
Vin(max)(V) 17 5.5 5.5
Vin(min)(V) 4.5 2.4 2.4
Vout(max)(V) 5.5 1.675 3.35
Vout(min)(V) 0.25 0.4 0.8
Duty cycle(max)(%) 100 100
DDR memory type LPDDR5
Additive RMS jitter(typ)(fs) 45 45
Core supply voltage(V) 1.8,2.5,3.3 1.8,2.5,3.3
Function Clock buffer,Differential Clock buffer,Differential
Input type HCSL,LP-HCSL,LVCMOS,LVDS,LVPECL HCSL,LP-HCSL,LVCMOS,LVDS,LVPECL Schmitt-Trigger
Number of outputs 12 12
Output frequency(max)(MHz) 2000 2000
Output skew(ps) 20 20
Output supply voltage(V) 1.8,2.5,3.3 1.8,2.5,3.3
Output type LVDS LVDS 3-State
Input bias current(Typ)(pA) 10 10 10
Output current(Typ)(mA) 65 65 65
Output swing headroom (to positive supply)(Typ)(V) -0.048 -0.048 -0.048
Total supply voltage(Min)(+5V=5, +/-5V=10) 2.7 2.7 2.7
CMRR(Min)(dB) 100 100 100
Iq per channel(Max)(mA) 2.8 2.92 2.92
Package Group SOIC|8,SOT-23-THIN|8,TSSOP|8,VSSOP|8,WSON|8 SC70|5,SOT-23|5,SOT-23|6 SC70|5,SOT-23|5,SOT-23|6
Total supply voltage(Max)(+5V=5, +/-5V=10) 40 40 40
Rail-to-rail In,Out In,Out In,Out
Slew rate(Typ)(V/us) 32 32 32
Input common mode headroom (to positive supply)(Typ)(V) 0 0 0
GBW(Typ)(MHz) 10.6 10.6 10.6
Vn at 1 kHz(Typ)(nV/rtHz) 7 7 7
CMRR(Typ)(dB) 115 115 115
Package size mm2 mm2 mm2
Input common mode headroom (to negative supply)(Typ)(V) 0 0 0
Vos (offset voltage @ 25 C)(Max)(mV) 1 1 1
Offset drift(Typ)(uV/C) 0.25 0.25 0.25
Output swing headroom (to negative supply)(Typ)(V) 0.048 0.048 0.048
Number of channels(#) 2 1 1
Iq per channel(Typ)(mA) 2.4 2.48 2.48
IOH(max)(mA) -7.8
IOL(max)(mA) 7.8
Number of channels 8
Supply current(max)(A) 2
Supply voltage(max)(V) 6
Supply voltage(min)(V) 2
Technology family HCS