The AD8368 is a variable gain amplifier (VGA) with analog linear-in-dB gain control that can be used from low frequencies to 800 MHz. Its excellent gain range, conformance, and flatness are attributed to the Analog Devices, Inc. X-AMP? architecture, an innovative technique for implementing high performance variable gain control.The gain range of ?12 dB to +22 dB is scaled accurately to 37.5 dB/V with excellent conformance error. The AD8368 has a 3 dB bandwidth of 800 MHz that is nominally independent of gain setting. At 140 MHz, the OIP3 is 33 dBm at maximum gain. The output noise floor is ?143 dBm/Hz, which corresponds to a 9.5 dB noise figure at maximum gain. The single-ended input and output impedances are nominally 50 ?.The gain of the AD8368 can be configured to be an increasing or decreasing function of the gain control voltage depending on whether the MODE pin is pulled to the positive supply or to ground, respectively. When MODE is pulled high, the AD8368 operates as a typical VGA with increasing gain.By connecting MODE to ground and using the on-board rms detector, the AD8368 can be configured as a complete automatic gain control (AGC) system with RSSI. The output power is accurately leveled to the internal default setpoint of 63 mV rms (?11 dBm referenced to 50 ?), independent of the waveform crest factor. Because the uncommitted detector input is available at DETI, the AGC loop can level the signal at the AD8368 output or at any other point in the signal chain over a maximum input power range of 34 dB. Furthermore, the setpoint level can be raised by dividing down the output signal before applying it to the detector.The AD8368 operates from a supply voltage of 4.5 V to 5.5 V and consumes 60 mA of current. It can be fully powered down to <3 mA by grounding the ENBL pin. The AD8368 is fabricated using the Analog Devices proprietary SiGe SOI complementary bipolar IC process. It is available in a 24-lead LFCSP and operates over the industrial temperature range of ?40?C to +85?C. Application boards are available upon request.ApplicationsComplete IF AGC amplifiers Gain trimming and leveling Cellular base stations Point-to-point radio links RF instrumentation Data Sheet, Rev. B, 09/2008

The AD8372 is a dual, digitally controlled, variable gainamplifier (VGA) that provides precise gain control, high IP3,and low noise figure. The excellent distortion performance andmoderate signal bandwidth make the AD8372 a suitable gain control device for a variety of multichannel receiverapplications.For wide input dynamic range applications, the AD8372provides a broad 41 dB gain range. The gain is programmedthrough a bidirectional 4-pin serial interface. The serial interface consists of a clock, latch, data input, and data output linesfor each channel. The AD8372 provides the ability to set the transconductance of the output stage using a single external resistor. The RXT1 and RXT2 pins provide a band gap derived stable reference voltage of 1.56 V. Typically 2.0 k? shunt resistors to ground are used toset the maximum gain to a nominal value of 31 dB. The currentsetting resistors can be adjusted to manipulate the gain anddistortion performance of each channel. This is a flexible feature in applications where it is desirable to trade off distortion performance for lower power consumption.The AD8372 is powered on by applying the appropriate logiclevel to the ENB1, ENB2 pins. When powered down, the AD8372consumes less than 2.6 mA and offers excellent input-to-outputisolation. The gain setting is preserved when powered down.Fabricated on an Analog Devices, Inc., high frequency BiCMOS process, the AD8372 provides precise gain adjustment capabilities with good distortion performance. The quiescent current of theAD8372 is typically 106 mA per channel. The AD8372 amplifier comes in a compact, thermally enhanced 5 mm ? 5 mm 32-leadLFCSP package and operates over the temperature range of ?40?C to +85?C.Applications Differential ADC drivers CMTS upstream direct sampling receivers CATV modem signal scaling Generic RF/IF gain stages Single-ended-to-differential conversion

The AD8418 is a high voltage, high resolution current shunt amplifier. It features an initial gain of 20 V/V, with a maximum ?0.15% gain error over the entire temperature range. The buffered output voltage directly interfaces with any typical converter. The AD8418 offers excellent input common-mode rejection from ?2 V to +70 V. The AD8418 performs bidirectional current measurements across a shunt resistor in a variety of automotive and industrial applications, including motor control, battery management, and solenoid control.The AD8418 offers breakthrough performance throughout the ?40?C to +125?C temperature range. It features a zero drift core, which leads to a typical offset drift of 0.1 ?V/?C throughout the operating temperature range and the common-mode voltage range. The AD8418 is fully qualified for automotive applications and includes EMI filters and patented circuitry to enable output accuracy with pulse-width modulation (PWM) type input common-mode voltages. The typical input offset voltage is ?200 ?V. The AD8418 is offered in 8-lead MSOP and SOIC packages.Applications High-side current sensing in Motor controls Solenoid controls Power management Low-side current sensing Diagnostic protection

The AD8479 is a difference amplifier with a very high inputcommon-mode voltage range. The AD8479 is a precision devicethat allows the user to accurately measure differential signals inthe presence of high common-mode voltages up to ?600 V.The AD8479 can replace costly isolation amplifiers in applicationsthat do not require galvanic isolation. The device operates overa ?600 V common-mode voltage range and has inputs that areprotected from common-mode or differential mode transientsup to ?600 V.The AD8479 has low offset voltage, low offset voltage drift, low gain drift, low common-mode rejection drift, and excellent common-mode rejection ratio (CMRR) over a wide frequency range.The AD8479 is available in a space-saving 8-lead SOIC package and is operational over the ?40?C to +125?C temperature range.Applications High voltage current sensing Battery cell voltage monitors Power supply current monitors Motor controls Isolation

The AD8556 is a zero-drift, sensor signal amplifier withdigitally programmable gain and output offset. Designed toeasily and accurately convert variable pressure sensor andstrain bridge outputsto a well-defined output voltage range,the AD8556 accurately amplifies many other differential orsingle-ended sensor outputs. The AD8556 uses the ADIpatented low noise auto-zero and DigiTrim? technologies tocreate an incredibly accurate and flexible signal processingsolution in a very compact footprint.Gain is digitally programmable in a wide range from 70 to1,280 through a serial data interface. Gain adjustment canbe fully simulated in-circuit and then permanently programmedwith reliable polyfuse technology. Output offsetvoltage is also digitally programmable and is ratiometric to thesupply voltage. AD8556 also features internal EMI filters on theVNEG, VPOS, FILT and VCLAMP pins.In addition to extremely low input offset voltage, low inputoffset voltage drift, and very high dc and ac CMRR, the AD8556 also includes a pull-up current source at the input pinsand a pull-down current source at the VCLAMP pin. Thisallows open wire and shorted wire fault detection. A low-passfilter function is implemented via a single low cost externalcapacitor. Output clamping set via an external reference voltageallows the AD8556 to drive lower voltage ADCs safely andaccurately.When used in conjunction with an ADC referenced to the samesupply, the system accuracy becomes immune to normal supplyvoltage variations. Output offset voltage can be adjusted with aresolution of better than 0.4% of the difference between VDDand VSS. A lockout trim after gain and offset adjustmentfurther ensures field reliability.The AD8556 is fully specified from ?40?C to +140?C.Operating from single-supply voltages of 2.7 V to 5.5 V, theAD8556 is offered in the 8-lead SOIC_N, and 4 mm ? 4 mm16-lead LFCSP_VQ.ApplicationsAutomotive SensorsPressure and Position SensorsPrecision Current SensingStrain Gages

The AD9081 mixed signal front end (MxFE?) is a highly integrated device with four 16-bit, 12 GSPS maximum sample rate, RF digital-to-analog converter (DAC) cores, and four 12-bit, 4 GSPS rate, RF analog-to-digital converter (ADC) cores. The AD9081 is well suited for applications requiring both wideband ADCs and DACs to process signal(s) that have wide instantaneous bandwidth. The device features eight transmit and eight receive lanes that support 24.75 Gbps/lane JESD204C or 15.5 Gbps/lane JESD204B standards. The device also has an on-chip clock multiplier, and a digital signal processing (DSP) capability targeted at either wideband or multiband direct to RF applications. The DSP datapaths can be bypassed to allow a direct connection between the converter cores and the JESD204 data transceiver port. The device also features low latency loopback and frequency hopping modes targeted at phase array radar system and electronic warfare applications. Two models for the AD9081 are offered. The 4D4AC model supports the full instantaneous channel bandwidth, whereas the 4D4AB model supports a maximum instantaneous bandwidth of 600 MHz per channel by automatically configuring the DSP to limit the instantaneous bandwidth at startup.APPLICATIONS Wireless communications infrastructure Microwave point-to-point, E-band and 5G mmWave Broadband communications systems DOCSIS 3.1 and 4.0 CMTS Phased array radar and electronic warfare Electronic test and measurement systems

The AD9094 is an 8-bit, 1 GSPS, quad analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. The device is designed to sample wide bandwidth analog signals up to 1.4 GHz. The AD9094 is optimized for wide input bandwidth, a high sampling rate, high works linearity, and low power in a small package. The quad-ADC cores feature multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs that support a variety of user-selectable input ranges. An integrated voltage reference facilitates design considerations. The analog inputs and clock signals are differential inputs. Users can configure each pair of intermediate frequency (IF) receiver outputs onto either one or two lanes of JESD204B Subclass 1 or Subclass 0, high speed, serialized outputs, depending on the sample rate and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF?, SYNCINB?AB, and SYNCINB?CD input pins. The AD9094 has flexible power-down options that allow significant power savings when desired. To program the power down options, use the 1.8 V capable, serial port interface (SPI). The AD9094 is available in a Pb-free, 72-lead, lead frame chip scale package (LFCSP) and is specified over a junction temperature range of ?40?C to +105?C. This product may be protected by one or more U.S. or international patents. Note that throughout the data sheet, multifunction pins, such as PDWN/STBY, are referred to either by the entire pin name or by a single function of the pin, for example, PDWN, when only that function is relevant. PRODUCT HIGHLIGHTS Low power consumption per channel. JESD204B lane rate support up to 15 Gbps. Wide, full power bandwidth supports IF sampling of signals up to 1.4 GHz. Buffered inputs ease filter design and implementation. Four integrated wideband decimation filters and numerically controlled oscillator (NCO) blocks supporting multiband receivers. Programmable fast overrange detection. On-chip temperature diode for system thermal management.APPLICATIONSLaser imaging, detection, and ranging (LIDAR)CommunicationsDigital oscilloscope (DSO)Ultrawideband satellite receiversInstrumentation

The AD9106 TxDAC? and waveform generator is a high performance, quad digital-to-analog converter (DAC) integrating on-chip pattern memory for complex waveform generation with a direct digital synthesizer (DDS). The DDS is a 12-bit output, up to 180 MHz master clock sinewave generator with a 24-bit tuning word allowing 10.8 Hz/LSB frequency resolution. The DDS has a single frequency output for all four DACs and independent programmable phase shift outputs for each of the four DACs.SRAM data can include directly generated stored waveforms, amplitude modulation patterns applied to DDS outputs, or DDS frequency tuning words.An internal pattern control state machine allows the user to program the pattern period for all four DACs as well as the start delay within the pattern period for the signal output on each DAC channel.Registers accessed using the serial peripheral interface (SPI) configure the digital waveform generator and load patterns into the SRAM.There are gain adjustment factors and offset adjustments applied to the digital signals on their way into the four DACs.The AD9106 offers exceptional ac and dc performance and supports DAC sampling rates up to 180 MSPS. The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9106 make it well suited for portable and low power applications.Applications Medical instrumentation Ultrasound transducer excitation Portable instrumentation Signal generators, arbitrary waveform generators

The AD9114/AD9115/AD9116/AD9117 are pin-compatible dual, 8-/10-/12-/14-bit, low power digital-to-analog converters (DACs) that provide a sample rate of 125 MSPS. These TxDAC? converters are optimized for the transmit signal path of communication systems. All the devices share the same interface, package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost.The AD9114/AD9115/AD9116/AD9117 offer exceptional ac and dc performance and support update rates up to 125 MSPS.The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9114/AD9115/AD9116/AD9117 make them well suited for portable and low power applications.PRODUCT HIGHLIGHTS Low Power. DACs operate on a single 1.8 V to 3.3 V supply; total power consumption reduces to 225 mW at 100 MSPS. Sleep and power-down modes are provided for low power idle periods. CMOS Clock Input. High speed, single-ended CMOS clock input supports a 125 MSPS conversion rate. Easy Interfacing to Other Components. Adjustable output common mode from 0 V to 1.2 V allows for easy interfacing to other components that accept common-mode levels greater than 0 V.?APPLICATIONS Wireless infrastructures Picocell, femtocell base stations Medical instrumentation Ultrasound transducer excitation Portable instrumentation Signal generators, arbitrary waveform generators

The AD9119/AD9129 are high performance, 11-/14-bit RF digital-to-analog converters (DACs) supporting data rates up to 2.85 GSPS. The DAC core is based on a quad-switch architecture that enables dual-edge clocking operation, effectively increasing the DAC update rate to 5.7 GSPS when configured for Mix-Mode? or 2? interpolation. The high dynamic range and bandwidth enable multicarrier generation up to 4.2 GHz.In baseband mode, wide bandwidth capability combines with high dynamic range to support from 1 to 158 contiguous carriers for CATV infrastructure applications. A choice of two optional 2? interpolation filters is available to simplify the postreconstruction filter by effectively increasing the DAC update rate by a factor of 2. In Mix-Mode operation, the AD9119/AD9129 can reconstruct RF carriers in the second and third Nyquist zone while still maintaining exceptional dynamic range up to 4.2 GHz. The high performance NMOS DAC core features a quad-switch architecture that enables industry-leading direct RF synthesis performance with minimal loss in output power. The output current can be programmed over a range of 9.5 mA to 34.4 mA.The AD9119/AD9129 include several features that may further simplify system integration. A dual-port, source synchronous LVDS interface simplifies the data interface to a host FPGA/ASIC. A differential frame/parity bit is also included to monitor the integrity of the interface. On-chip delay locked loops (DLLs) optimize timing between different clock domains.A serial peripheral interface (SPI) configures the AD9119/ AD9129 and monitors the status of readback registers. The AD9119/AD9129 are manufactured on a 0.18 ?m CMOS process and operates from +1.8 V and ?1.5 V supplies. It is supplied in a 160-ball chip scale package ball grid array.Product Highlights High dynamic range and signal reconstruction bandwidth support RF signal synthesis of up to 4.2 GHz. Dual-port interface with double data rate (DDR) LVDS data receivers supports 2850 MSPS maximum conversion rate. Manufactured on a CMOS process; a proprietary switching technique enhances dynamic performance.Applications Broadband communications systems CMTS/VOD Wireless infrastructure: W-CDMA, LTE, point-to-point Instrumentation, automatic test equipment (ATE) Radar, jammers