Evaluation Module for TPS54295 Synchronous Step-Down Converter

The ADXL1004 delivers ultralow noise density over an extended frequency range and is optimized for bearing fault detection and diagnostics. The ADXL1004 has typical noise density of 125 ?g/?Hz across the linear frequency range. Microelectronicmechanical systems (MEMS) accelerometers have stable and repeatable sensitivity, and are immune to external shocks up to 10,000 g.The integrated signal conditioning electronics enable such features as full electrostatic self test (ST) and an overrange (OR) indicator, useful for embedded applications. With low power and single-supply operation of 3.3 V to 5.25 V, the ADXL1004 also enables wireless sensing product design. The ADXL1004 is available in a 5 mm ? 5 mm ? 1.80 mm LFCSP package, and operates over the ?40?C to +125?C temperature range.Applications Condition monitoring Predictive maintenance Asset health Test and measurement Health usage monitoring system (HUMSs) Acoustic emissions

The ADP322/ADP323 200 mA triple output LDOs combine high PSRR, low noise, low quiescent current, and low dropout voltage to extend the battery life of portable devices and are ideally suited for wireless applications with demanding performance and board space requirements.The ADP322/ADP323 PSRR is greater than 60 dB for frequencies as high as 100 kHz while operating with a low headroom voltage. The ADP322/ADP323 offer much lower noise performance than competing LDOs without the need for a noise bypass capacitor.The ADP322/ADP323 are available in a miniature 16-lead, 3 mm ? 3 mm LFCSP package and are stable with tiny 1 ?F ?30% ceramic output capacitors providing the smallest possible board area for a wide variety of portable power needs.The ADP322 is available in output voltage combinations ranging from 0.8 V to 3.3 V and offers overcurrent and thermal protection to prevent damage in adverse conditions. The ADP323 adjustable triple LDO can be configured for any output voltage between 0.5 V and 5 V with two resistors for each output.Applications Mobile phones Digital cameras and audio devices Portable and battery-powered equipment Portable medical devices Post dc-to-dc regulation

RAA489206 - Battery Monitor Power Management Evaluation Board

DUAL LDO WITH MICROCONTROLLER RESET FUNCTION

The ADM2485 differential bus transceiver is an integrated, galvanically isolated component designed for bidirectional data communication on multipoint bus transmission lines. It is designed for balanced transmission lines and complies with ANSI/TIA/EIA RS-485-A-98 and ISO 8482:1987(E).The device employs Analog Devices, Inc., iCoupler? technology to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package. An on-chip oscillator outputs a pair of square waveforms that drive an external transformer to provide isolated power with an external transformer. The logic side of the device can be powered with either a 5 V or a 3.3 V supply, and the bus side is powered with an isolated 5 V supply.The ADM2485 driver has an active high enable. The driver differential outputs and the receiver differential inputs are connected internally to form a differential input/output port that imposes minimal loading on the bus when the driver is disabled or when VDD1 or VDD2 = 0 V. Also provided is an active high receiver disable that causes the receive output to enter a high impedance state.The device has current-limiting and thermal shutdown features to protect against output short circuits and situations where bus contention might cause excessive power dissipation. The part is fully specified over the industrial temperature range and is available in a 16-lead, wide-body SOIC package.Applications Isolated RS-485/RS-422 interfaces PROFIBUS networks Industrial field networks Multipoint data transmission systems

Bluetooth Development Tools - 802.15.1 EVK for BMD-380 with open CPUStand-alone Bluetooth Low EnergyInternal antenna

The AD9684 is a dual, 14-bit, 500 MSPS ADC. The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed for sampling wide bandwidth analog signals. The AD9684 is optimized for wide input bandwidth, a high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth buffered inputs, supporting a variety of user selectable input ranges. An integrated voltage reference eases design considerations. Each ADC data output is internally connected to an optional decimate by 2 block.The analog input and clock signals are differential inputs. Each ADC data output is internally connected to two digital downconverters (DDCs). Each DDC consists of four cascaded signal processing stages: a 12-bit frequency translator (NCO), and three half-band decimation filters supporting a divide by factor of two, four, and eight.Applications Communications Diversity multi-band, multi-mode digital receivers 3G/4G, TD-SCDMA, WCDMA, MC-GSM, LTE General-purpose software radios Ultrawideband satellite receiver Instrumentation (spectrum analyzers, network analyzers, integrated RF test solutions) Radar Digital oscilloscopes High speed data acquisition systems DOCSIS CMTS upstream receive paths HFC digital reverse path receivers

EVAL MODULE FOR ADS62P23

Power Management IC Development Tools Evaluation board based on the ST1PS01EJR 400 mA nano-quiescent synchronous step-down converter