I2C Controlled 3A Single Cell USB NVDC-1 Charger with Adjustable Voltage USB OTG Evaluation Module

The LTC3880/LTC3880-1 are dual, PolyPhase DC/DC synchronous step-down switching regulator controllers with an I2C-based PMBus compliant serial interface. The controllers use a constant frequency, current mode architecture that is supported by LTpowerPlay? software development tool with graphical user interface (GUI).Switching frequency, output voltage, and device address can be programmed using external configuration resistors. Parameters can be set via the digital interface or stored in EEPROM. Voltage, current, internal/external temperature and fault status can be read back through the bus interface. The LTC3880 incorporates a 5V linear regulator while the LTC3880-1 uses an external 5V supply for minimum power loss. See comparison to LTC3887 below. VOUT Start-Up Time Max VOUT0/1 Fast ADC Mode for 1 Parameter LTC3887/LTC3887-1 35ms 5.5V/5.5V No LTC3880/LTC3880-1 120ms 4V/5.4V No Applications High Current Distributed Power Systems Telecom, Datacom and Storage Systems Intelligent Energy Efficient Power Regulation

The LT3029 is a dual, micropower, low noise, low dropout linear regulator. The device operates either with a common input supply or independent input supplies for each channel, over an input voltage range of 1.8V to 20V. Each output supplies up to 500mA of output current with a typical dropout voltage of 300mV. Quiescent current is well controlled in dropout. With an external 10nF bypass capacitor, output noise is only 20?VRMS over a 10Hz to 100kHz bandwidth. Designed for use in battery-powered systems, the low 55?A quiescent current per channel makes it an ideal choice. In shutdown, quiescent current drops to less than 1?A. Shutdown control is independent for each channel, allowing for flexible power management.The LT3029 optimizes stability and transient response with low ESR ceramic output capacitors, requiring a minimum of only 3.3?F. The regulator does not require the addition of ESR, as is common with other regulators.Internal circuitry provides reverse-battery protection, reverse-current protection, current limiting with foldback and thermal shutdown. The device is available as an adjustable output voltage device with a 1.215V reference voltage. The LT3029 is offered in the thermally enhanced 16-lead MSOP and 16-lead, low profile (4mm ? 3mm ? 0.75mm) DFN packages.Applications General Purpose Linear Regulator Battery-Powered Systems Microprocessor Core/Logic Supplies Post Regulator for Switching Supplies Tracking/Sequencing Power Supplies

The ADIN1300 is a low power, single port, Gigabit Ethernet transceiver with low latency and power consumption specifications primarily designed for industrial Ethernet applications.This design integrates an energy efficient Ethernet (EEE) physical layer device (PHY) core with all associated common analog circuitry, input and output clock buffering, management interface and subsystem registers, and MAC interface and control logic to manage the reset and clock control and pin configuration.The ADIN1300 is available in a 6 mm ? 6 mm, 40-lead lead frame chip scale package (LFCSP). The device operates with a minimum of 2 power supplies, 0.9 V and 3.3 V, assuming the use of a 3.3 V MAC interface supply. For maximum flexibility in system level design, a separate VDDIO supply enables the management data input/output (MDIO) and MAC interface supply voltages to be configured independently of the other circuitry on the ADIN1300, allowing operation at 1.8 V, 2.5 V, or 3.3 V. At power-up, the ADIN1300 is held in hardware reset until each of the supplies has crossed its minimum rising threshold value. Brown-out protection is provided by monitoring the supplies to detect if one or more supply drops below a minimum falling threshold (see Table 17 on the datasheet), and holding the device in hardware reset until the power supplies return and satisfy the power-on reset (POR) circuit.The MII management interface (also referred to as MDIO interface) provides a 2-wire serial interface between a host processor or MAC (also known as management station (STA)) and the ADIN1300, allowing access to control and status information in the PHY core management registers. The interface is compatible with both the IEEE 802.3 Standard Clause 22 and Clause 45 management frame structures.The ADIN1300 can support cable lengths up to 150 meters at Gigabit speeds and 180 meters when operating at 100 Mbps or 10 Mbps.Applications Industrial automation Process control Factory automation Robotics/Motion Control Building automation Test and Measurement Industrial IoT

EVAL MOD FOR BQ24200-BQ24205

ISL6146A - ORing Controller / Load Share Power Management Evaluation Board

The LT5506 is a 40MHz to 500MHz monolithic integrated quadrature demodulator with variable gain amplifier (VGA), designed for low voltage operation. It supports standards that use a linear modulation format. The chip consists of a VGA, quadrature down-converting mixers and lowpass noise filters. The LO port consists of a divide-by-two stage and LO buffers. The IC provides all building blocks for IF down-conversion to I and Q baseband signals with a single supply voltage of 1.8V to 5.25V. The VGA gain has a linear-in- dB relationship to the control input voltage. Hard-clipping amplifiers at the mixer outputs reduce the recovery time from a signal overload condition. The lowpass filters reduce the out-of-band noise and spurious frequency components. The cut-off frequency of the noise filters is approximately 8.8MHz. The external 2xLO frequency is required to be twice the IF input frequency for the mixers. The standby mode provides reduced supply current and fast transient response into the normal operating mode when the I/Q outputs are AC-coupled to a baseband chip.Applications IEEE802.11 High Speed Wireless LAN Wireless Local Loop

The ADAR4002 is a very low power broadband bi-directional single channel true time delay unit (TDU) and a digital step attenuator (DSA). The IC has 18.5 GHz of bandwidth over a frequency range of 0.5 GHz to 19 GHz with 50 ? input impedance at both RF ports. The TDU has two programmable maximum time delays, each with 7-bit control: Range 0 has a maximum delay of 508ps with a resolution of 4ps. This range is used at lower frequencies and where the ADAR4002 has less loss. Range 1 has a maximum delay of 254ps and a resolution of 2ps. This range has less loss compared to Range 0 and is useful at higher frequencies. The DSA has 6-bit resolution with an attenuation range of 0 dB to 31.5 dB and a step size of 0.5 dB. The ADAR4002 is designed to provide flexible digital control through either a SPI interface or a shift register to allow daisy chaining multiple chips together. The ADAR4002 contains register memory for 32 TDU+DSA states. The memory combined with on-chip sequencers, allows a fast memory advance via the UPDATE pin.The ADAR4002 is available in a 2 mm ? 3 mm 14-lead LFCSP package and is specified from -40?C to 85?C.APPLICATIONSElectronic steerable antenna arraysMulti-Function ArraysSATCOMRADARData LinksTest Equipment

The ADuM4135 is a single-channel gate driver specificallyoptimized for driving insulated gate bipolar transistors (IGBTs).Analog Devices, Inc., iCoupler? technology provides isolationbetween the input signal and the output gate drive.The ADuM4135 includes a Miller clamp to provide robust IGBT turn-off with a single-rail supply when the gate voltage drops below 2 V (typical). Operation with unipolar or bipolar secondary supplies is possible, with or without the Miller clamp operation.The Analog Devices chip scale transformers also provide isolated communication of control information between the high voltage and low voltage domains of the chip. Information on the status of the chip can be read back from dedicated outputs. Control of resetting the device after a fault on the secondary is performed on the primary side of the device.Integrated onto the ADuM4135 is a desaturation detection circuit that provides protection against high voltage short-circuit IGBT operation. The desaturation protection contains noise reducing features such as a 370 ns (typical) masking time after a switching event to mask voltage spikes due to initial turn-on. An internal 537 ?A (typical) current source allows low device count and the internal blanking switch allows the addition of an external current source if more noise immunity is needed.The secondary UVLO is set to 11.67 V (typical) with common IGBT threshold levels taken into consideration.APPLICATIONS MOSFET/IGBT gate drivers PV inverters Motor drives Power supplies Automotive

DRV8870 H-Bridge PWM Motor Driver Evaluation Module