The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

DRV8308 evaluation module for three-phase brushless DC motor pre-drivers

The AD9234 is a dual, 12-bit, 1 GSPS/500 MSPS ADC. The device has an on-chip buffer and sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed for sampling wide bandwidth analog signals. The AD9234 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth buffered inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. Each ADC data output is internally connected to an optional decimate-by-2 block. The AD9234 has several functions that simplify the automatic gain control (AGC) function in a communications receiver.?The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input. In addition to the fast detect outputs, the AD9234 also offers signal monitoring capability. The signal monitoring block provides additional information about the signal being digitized by the ADC.Users can configure the Subclass 1 JESD204B-based high speed serialized output in a variety of one-, two-, or four-lane configurations, depending on the acceptable lane rate of the receiving logic device and the sampling rate of the ADC. Multiple device synchronization is supported through the SYSREF? and SYNCINB? input pins.The AD9234 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V to 3.3 V capable 3-wire SPI.The AD9234 is available in a Pb-free, 64-lead LFCSP and is specified over the ?40?C to +85?C industrial temperature range. This product is protected by a U.S. patent.Product Highlights Low power consumption analog core, 12-bit, 1.0 GSPS dual analog-to-digital converter (ADC) with 1.5 W per channel. Wide full power bandwidth supports IF sampling of signals up to 2 GHz. Buffered inputs with programmable input termination eases filter design and implementation. Flexible serial port interface (SPI) controls various product features and functions to meet specific system requirements. Programmable fast overrange detection. 9 mm ? 9 mm 64-lead LFCSP. Pin compatible with the AD9680 14-bit, 1 GSPS dual ADC.Applications Communications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE Point-to-point radio systems Digital predistortion observation path General-purpose software radios Ultrawideband satellite receiver Instrumentation (spectrum analyzers, network analyzers, integrated RF test solutions) Digital oscilloscopes High speed data acquisition systems DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

DS80PCI402EVK 4 Channels SMA Evaluation Kit

The HMC1119 is a broadband, highly accurate, 7-bit digitalattenuator, operating from 0.1 GHz to 6.0 GHz with 31.5 dBattenuation control range in 0.25 dB steps.The HMC1119 is implemented in a silicon process, offeringvery fast settling time, low power consumption, and high ESDrobustness. The device features safe state transitions and isoptimized for excellent step accuracy and high linearity overfrequency and temperature range. The RF input and output areinternally matched to 50 ? and do not require any externalmatching components. The design is bidirectional; therefore,the RF input and output are interchangeable.The HMC1119 has an on-chip regulator that can support a widesupply operating range from 3.3 V to 5.0 V with no performancechange in electrical characteristics. The HMC1119 incorporates adriver that supports serial (3-wire) and parallel controls of theattenuator.The HMC1119 comes in a RoHS-compliant, compact, 4 mm ?4 mm LFCSP package.A fully populated evaluation board is available.Applications Cellular infrastructure Microwave radios and very small aperture terminals (VSATs) Test equipment and sensors IF and RF designs

DS100BR111A Ultra Low Power 10.3 Gbps 2-Channel Repeater w/Input Eq EVM

The LT1738 is a switching regulator controller designed to lower conducted and radiated electromagnetic interference (EMI). Ultralow noise and EMI are achieved by controlling the voltage and current slew rates of an external N-channel MOSFET switch. Current and voltage slew rates can be independently set to optimize harmonic content of the switching waveforms vs efficiency. The LT1738 can reduce high frequency harmonic power by as much as 40dB with only minor losses in efficiency. The LT1738 utilizes a current mode architecture optimized for single switch topologies such as boost, flyback and Cuk. The IC includes gate drive and all necessary oscillator, control and protection circuitry. Unique error amp circuitry can regulate both positive and negative voltages. The internal oscillator may be synchronized to an external clock for more accurate placement of switching harmonics. Protection features include gate drive lockout for low VIN, soft-start, output current limit, short-circuit current limit-ing, gate drive overvoltage clamp and input supply undervoltage lockout.Applications Power Supplies for Noise Sensitive Communication Equipment EMI Compliant Offline Power Supplies Precision Instrumentation Systems Isolated Supplies for Industrial Automation Medical Instruments Data Acquisition Systems

The HMC639ST89(E) is a GaAs PHEMT, High Linearity, Low Noise, Wideband Gain Block Amplifier covering 0.2 to 4.0 GHz. Packaged in an industry standard SOT89, the amplifier can be used as either a cascadable 50 Ohm gain stage, a PA Pre-Driver, a Low Noise Amplifier, or a Gain Block with up to +22 dBm output power. This versatile Gain Block Amplifier is powered from a single +5V supply and requires no external matching components. The internally matched topology permits this amplifier to be readily ported between virtually any printed circuit board material, regardless of its dielectric constant, thickness, or composition.Applications Cellular / PCS / 3G WiMAX, WiBro, & Fixed Wireless CATV & Cable Modem Microwave Radio IF and RF Sections?

The ADL8104 is a gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), pseudomorphic high electron mobility transistor (pHEMT), low noise, wideband, high linearity amplifier that operates from 0.4 GHz to 7.5 GHz.The ADL8104 provides a typical gain of 15 dB at 0.6 GHz to 6 GHz, a 3.5 dB typical noise figure at 0.4 GHz to 6 GHz, a 20 dBm typical output power for 1 dB compression (OP1dB) at 0.6 GHz to 6 GHz, and a typical output third-order intercept (OIP3) of 32 dBm at 0.6 GHz to 6 GHz, requiring only 150 mA from a 5 V drain supply voltage. The low noise amplifier has a high output second-order intercept (OIP2) of 52 dBm typical at 0.6 GHz to 6 GHz, making the ADL8104 suitable for military and test instrumentation applications.The ADL8104 also features inputs and outputs that are internally matched to 50 ?. The RFIN and RFOUT pins are internally ac-coupled and the bias inductor is also integrated, making the ADL8104 ideal for surface-mounted technology (SMT)-based, high density applications.The ADL8104 is housed in an RoHS-compliant, 3 mm ? 3 mm, 16-lead LFCSP.APPLICATIONSTest instrumentationMilitary communications

LED Lighting Development Tools 3 A buck LED driver board based on the LED5000