KIT EVAL MODULE FOR CC2545

TPS92638 Eight Channels linear LED driver EVM

The ADP1031 is a high performance, isolated micropowermanagement unit (PMU) that combines an isolated flybackdc-to-dc regulator, an inverting dc-to-dc regulator, and abuck dc-to-dc regulator, providing three isolated power rails.Additionally, the ADP1031 contains four, high speed, serialperipheral interface (SPI) isolation channels and three general-purpose isolators for channel to channel applications where lowpower dissipation and small solution size is required.Operating over an input voltage range of +4.5 V to +60 V, theADP1031 generates isolated output voltages of +6 V to +28 V(adjustable version) or+ 21 V and +24 V (fixed versions) forVOUT1, factory programmable voltages of +5.15 V, +5.0 V, or+3.3 V for VOUT2, and an adjustable output voltages of ?24 V to?5 V for VOUT3.By default, the ADP1031 flyback regulator operates at a 250 kHzswitching frequency and the buck and inverting regulators operateat 125 kHz. All three regulators are phase shifted relative to eachother to reduce electromagnetic interference (EMI). The ADP1031can be driven by an external oscillator in the range of 350 kHzto 750 kHz to ease noise filtering in sensitive applications.The digital isolators integrated in the ADP1031 use AnalogDevices, Inc., iCoupler? chip scale transformer technology,optimized for low power and low radiated emissions.The ADP1031 is available in a 9 mm ? 7 mm, 41-lead LFCSP andis rated for a ?40?C to +125?C operating junction temperaturerange.Applications Industrial automation and process control Instrumentation and data acquisition systems Data and power isolation

BOARD EVAL 4A POWERWISE LM20124

The AD9512 provides a multi-output clock distribution function for input signals up to 1.6 GHz. The design emphasizes low jitter and low phase noise in order to maximize data converter clocking performance. Three independent LVPECL and two LVDS clock outputs operate to 1.2 GHz and 800 MHz respectively. Optional CMOS clock outputs available to 250 MHz. Each output has a programmable divider, which may be bypassed or set to divide by any integer up to 32.Each divider allows the user to change the phase of one clock output relative to another clock output. This phase select functions as a coarse timing adjustment. One output also features a programmable delay element with a user-selected, fullscale range to 10 ns. This fine tuning delay block is programmed with a 5-bit word, which gives the user 32 possible delays from which to choose.The AD9512 is ideally suited for data converter clocking applications where maximum converter performance is achieved with sub-picosecond jitter encode signals.The AD9512 is available in a 48-lead LFCSP and is specified from -40?C to +85?C. The part may be run from a single 3.3 V supply. ApplicationsLow jitter, low phase noise clock distribution Clocking high speed ADCs, DACs, DDS, DDC, DUC, MxFE? ConvertersWireless infrastructure transceiversHigh performance instrumentationBroadband infrastructure

The HMC582LP5(E) is a GaAs InGaP Herterojunction Bipolar Transistor (HBT) MMIC VCOs. The HMC582LP5(E) integrates resonators, negative resistance devices, varactor diodes and feature half frequency and divide-by-4 outputs. The VCO's phase noise performance is excellent over temperature, shock and process due to the oscillator's monolithic structure.Power output is +9 dBm typical from a +5V supply voltage. The prescaler and RF/2 functions can be disabled to conserve current if not required. The voltage controlled oscillator is packaged in a leadless QFN 5?5 mm surface mount package, and requires no external matching components.APPLICATIONS Point-to-Point Radios Point-to-Multi-Point Radios Test Equipment & Industrial Controls SATCOM Military End-Use

The HMC7144LC4 is a broadband driver amplifier for electro-absorption modulated lasers (EML) and supports data-rates up to 28.3 Gbps to meet the 100Gb Ethernet system requirements. The part provides the module designers scalable power dissipation for varying drive voltage characteristics of different modulators and the power consumption of the module can be set as low as 0.12W to 0.5W at 1.5Vpp and 2.2Vpp outputs amplitudes, respectively. The HMC7144LC4 supports wide range of supply voltages from 3.5V to 6V and delivering excellent time domain performance. The driver incorporates the unique feature, peak-detector with reference, which enables the continuous output amplitude monitoring without the need for an external high-frequency circuitry. The output amplitude and cross-point can be adjusted via control pins. The input and output are 50 Ohms matched and used AC coupled. The HMC7144LC4 is in robust leadless 4x4mm ceramic surface mountable package.APPLICATIONS Operation up to 28.3 Gbps Low DC Power Dissipation: 0.12W for 1.5Vpp swing @ 3.5V supply 0.50W for 2.3Vpp swing @ 6V supply Adjustable Output Amplitude from 1.2Vpp to 2.3Vpp Integrated Peak Detector 24 Lead Ceramic 4x4mm SMT Package: 16 mm2

Evaluation Module for TPS56121 High Current (15A) Synchronous Step-Down SWIFT™ Converter

Bluetooth Development Tools - 802.15.1 EVAL BOARD FOR BMD-360 nRF52811

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.