DC249A-A: Demo Board for the LTC1682 Doubler Charge Pumps with Low Noise Linear Regulator.

Evaluation Module for TPS650732 5-Channel Power Management IC

EVAL BOARD FOR KSZ8795

The ADF7023 is a very low power, high performance, highly integrated 2FSK/GFSK/OOK/MSK/GMSK transceiver designed for operation in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands, which cover the worldwide license-free ISM bands at 433 MHz, 868 MHz, and 915 MHz. It is suitable for circuit applications that operate under the European ETSI EN300-220, the North American FCC (Part 15), the Chinese short-range wireless regulatory standards, or other similar regional standards. Data rates from 1 kbps to 300 kbps are supported.The transmit RF synthesizer contains a VCO and a low noise fractional-N PLL with an output channel frequency resolution of 400 Hz. The VCO operates at 2? or 4?, the fundamental frequency to reduce spurious emissions. The receive and transmit synthesizer bandwidths are automatically, and independently, configured to achieve optimum phase noise, modulation quality, and settling time. The transmitter output power is programmable from ?20 dBm to +13.5 dBm, with automatic PA ramping to meet transient spurious specifications. The part possesses both single-ended and differential PAs, which allows for Tx antenna diversity.The receiver is exceptionally linear, achieving an IP3 specification of ?12.2 dBm and ?11.5 dBm at maximum gain and minimum gain, respectively, and an IP2 specification of 18.5 dBm and 27 dBm at maximum gain and minimum gain, respectively. The receiver achieves an interference blocking specification of 66 dB at ?2 MHz offset and 74 dB at ?10 MHz offset. Thus, the part is extremely resilient to the presence of interferers in spectrally noisy environments. The receiver features a novel, high speed, automatic frequency control (AFC) loop, allowing the PLL to find and correct any RF frequency errors in the recovered packet.A patent pending, image rejection calibration scheme is available through a program download. The algorithm does not require the use of an external RF source nor does it require any user intervention once initiated. The results of the calibration can be stored in nonvolatile memory for use on subsequent power-ups of the transceiver.See data sheet for additional information.Applications Smart metering IEEE 802.15.4g Wireless MBUS Home automation Process and building control Wireless sensor networks (WSNs) Wireless healthcare

The LTC6560 is a low-noise, transimpedance amplifier (TIA) with 220MHz bandwidth. The LTC6560?s low noise, high transimpedance and low power dissipation are ideal for LIDAR receivers using avalanche photodiodes (APDs). The LTC6560 features 74k? transimpedance gain and 30?A linear input current range. Using an input circuit with a total input capacitance of 2pF, the input current noise density is 4.8pA/?Hz at 200MHz. With lower capacitance, noise and bandwidth improve further. The LTC6560 operates from a single 5V supply and consumes only 90mW. Utilizing the LTC6560?s output MUX, multiple LTC6560 devices can be combined to a single output. The LTC6560?s fast overload recovery and fast output MUXing make it well suited for LIDAR receivers with multiple APDs. Its single-ended output can swing 2VP-P on a 100? load. Its low impedance op amp style output has been designed to drive back-terminated 50? cables.The LTC6560 is packaged in a compact 3mm ? 3mm 16-pin leadless QFN package with an exposed pad for thermal management and low inductance.Applications LIDAR Receiver Industrial Imaging

The AD97481 is an 8-bit resolution, wideband, third generation member of the TxDAC series of high performance, low power CMOS digital-to-analog converters (DACs). The TxDAC family, consisting of pin-compatible 8-, 10-, 12-, and 14-bit DACs, is specifically optimized for the transmit signal path of communication systems. All of the devices share the same interface options, small outline package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost. The AD9748 offers exceptional ac and dc performance while supporting update rates up to 210 MSPS. The AD9748?s low power dissipation makes it well suited for portable and low power applications. Its power dissipation can be further reduced to 60 mW with a slight degradation in performance by lowering the full-scale current output. In addition, a power-down mode reduces the standby power dissipation to approximately 15 mW. A segmented current source architecture is combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance. Edge-triggered input latches and a 1.2 V temperature-compensated band gap reference have been integrated to provide a complete monolithic DAC solution. The digital inputs support 3 V CMOS logic families. PRODUCT HIGHLIGHTS 32-lead LFCSP. The AD9748 is the 8-bit member of the pin-compatible TxDAC family, which offers excellent INL and DNL performance. Differential or single-ended clock input (LVPECL or CMOS), supports 210 MSPS conversion rate. Data input supports twos complement or straight binary data coding. Low power: Complete CMOS DAC function operates on 135 mW from a 2.7 V to 3.6 V single supply. The DAC full-scale current can be reduced for lower power operation, and a sleep mode is provided for low power idle periods. On-chip voltage reference: The AD9748 includes a 1.2 V temperature-compensated band gap voltage reference.?APPLICATIONS Communications Direct digital synthesis (DSS) Instrumentation

4 Channel LED Driver Evaluation Board

TPA2016D2 Evaluation Module (EVM)

TPA3132D2EVM for 25W Class-D Speaker Amplifier

The AD7887 is a high speed, low power, 12-bit analog-to-digital converter (ADC) that operates from a single 2.7 V to 5.25 V power supply. The AD7887 is capable of 125 kSPS throughput rate. The input track-and-hold acquires a signal in 500 ns and features a single-ended sampling scheme. The output coding for the AD7887 is straight binary, and the part is capable of converting full power signals of up to 2.5 MHz.The AD7887 can be configured for either dual- or single-channel operation via the on-chip control register. There is a default single-channel mode that allows the AD7887 to be operated as a read-only ADC. In single-channel operation, there is one analog input (AIN0) and the AIN1/VREF pin assumes its VREF function. This VREF pin allows the user access to the part?s internal 2.5 V reference, or the VREF pin can be overdriven by an external reference to provide the reference voltage for the part. This external reference voltage has a range of 2.5 V to VDD. The analog input range on AIN0 is 0 to VREF.In dual-channel operation, the AIN1/VREF pin assumes its AIN1 function, providing a second analog input channel. In this case, the reference voltage for the part is provided via the VDD pin. As a result, the input voltage range on both the AIN0 and AIN1 inputs is 0 to VDD.CMOS construction ensures low power dissipation of typically 2 mW for normal operation and 3 ?W in power-down mode. The part is available in an 8-lead, 0.15-inch-wide narrow body SOIC and an 8-lead MSOP package.Product HighlightsSmallest 12-bit dual-/single-channel ADC; 8-lead MSOP package.Lowest power 12-bit dual-/single-channel ADC.Flexible power management options, including automatic power-down after conversion.Read-only ADC capability.Analog input range from 0 V to VREF.Versatile serial input/output port (SPI/QSPI/MICROWIRE/ DSP compatible).ApplicationsBattery-powered systems (personal digital assistants, medical instruments, mobile communications)Instrumentation and control systemsHigh speed modems