The ADuC841/ADuC842/ADuC843are complete smart transducer front ends, that integrates a high performance self-calibrating multichannel ADC, a dual DAC, and an optimized single-cycle 20 MHz 8-bit MCU (8051 instruction set compatible)on a single chip.The ADuC841 and ADuC842 are identical with the exception of the clock oscillator circuit; the ADuC841 is clocked directly from an external crystal up to 20 MHz whereas the ADuC842 uses a 32 kHz crystal with an on-chip PLL generating aprogrammable core clock up to 16.78 MHz.The ADuC843 is identical to the ADuC842 except that the ADuC843 has no analog DAC outputs.The microcontroller is an optimized 8052 core offering up to 20 MIPS peak performance. Three different memory options are available offering up to 62 kBytes of nonvolatile Flash/EE program memory. Four kBytes of nonvolatile Flash/EE data memory, 256 bytes RAM, and 2 kBytes of extended RAM arealso integrated on-chip. The parts also incorporate additional analog functionality with two 12-bit DACs, power supply monitor, and a band gap reference. On-chip digital peripherals include two 16-bit ?-?. DACs, a dual output 16-bit PWM, a watchdog timer, a time interval counter, three timers/counters, and three serial I/O ports (SPI, I2C, and UART).On the ADuC812 and the ADuC832, the I2C and SPI interfaces share some of the same pins. For backwards compatibility, this is also the case for the ADuC841/ADuC842/ADuC843.However, there is also the option to allow SPI operate separately on P3.3, P3.4, and P3.5, while I2C uses the standard pins. The I2C interface has also been enhanced to offer repeated start, general call, and quad addressing.On-chip factory firmware supports in-circuit serial download and debug modes (via UART) as well as single-pin emulation mode via the EA pin.Applications Optical networking?laser power control Base station systems Precision instrumentation, smart sensors Transient capture systems DAS and communications systems

The AD7714 is a complete analog front end for low-frequency measurement applications. The device accepts low level signals directly from a transducer and outputs a serial digital word. It employs a sigma-delta conversion technique to realize up to 24 bits of no missing codes performance. The input signal is applied to a proprietary programmable gain front end based around an analog modulator. The modulator output is processed by an on-chip digital filter. The first notch of this digital filter can be programmed via the on-chip control register allowing adjustment of the filter cutoff and settling time. The part features three differential analog inputs (which can also be configured as five pseudo-differential analog inputs) as well as a differential reference input. The AD7714 thus performs all signal conditioning and conversion for a system consisting of up to five channels. A new Y grade has recently been added to the existing range. Compared to the A grades this new grade has an extended operating temperature range, schmitt trigger inputs on SCLK and DIN, tighter linearity specifications, lower power consumption and is available in a smaller package.The AD7714 is ideal for use in smart microcontroller- or DSP-based systems. It features a serial interface that can be configured for three-wire operation. Gain settings, signal polarity and channel selection can be configured in software using the serial port. The AD7714 provides self-calibration, system calibration and background calibration options and also allows the user to read and write the on-chip calibration registers. CMOS construction ensures very low power dissipation, and the power-down mode reduces the standby power consumption to 15 ?W typical at 3 V. Minimum operating voltage for the A grades is 3 V and 2.7 V for the Y grades. The A grades are available in a 24-pin, 0.3 inch-wide, plastic dual-in-line package (DIP); a 24 lead small outline (SOIC) package and a 28-lead shrink small outline package (SSOP). The new Y grade is available in a 24-pin, 0.3 inch-wide, plastic dual-in-line package (DIP); a 24 lead small outline (SOIC) package and a 24-lead Thin Shrink Small Outline Package (TSSOP).

The AD7194 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (?-?) analog-to-digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can interface directly to the ADC.The device can be configured to have eight differential inputs or sixteen pseudo differential inputs. The on-chip 4.92 MHz clock can be used as the clock source to the ADC or, alternatively, an external clock or crystal can be used. The output data rate from the part can be varied from 4.7 Hz to 4.8 kHz.The device has a very flexible digital filter, including a fast settling option. Variables such as output data rate and settling time are dependent on the option selected. For applications that require all conversions to be settled, the AD7194 includes zero latency.The part operates with a power supply from 3 V to 5.25 V. It consumes a current of 4.65 mA, and it is housed in a 32-lead LFCSP package.Applications PLC/DCS analog input modules Data acquisition Strain gage transducers Pressure measurement Temperature measurement Flow measurement Weigh scales Chromatography Medical and scientific instrumentation

Data Conversion IC Development Tools EVAL BRD AD5379

Data Conversion IC Development Tools EVAL BRD AD5680

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The ADM1073 is a full-feature, negative voltage, hot swap controller that allows boards to be safely inserted and removed from a live ?48 V backplane. The part provides precise and robust current limiting, and protection against both transient and nontransient short circuits in overvoltage and undervoltage conditions. The ADM1073 can operate from a negative voltage of ?18 V to ?80 V and can tolerate transient voltages of up to ?200 V.Inrush current is limited to a programmable value by control-ling the gate drive of an external N-channel FET. The maximum current limit is set by the choice of the sense resistor, RSENSE.A built-in soft start function allows control of the inrush current profile by an external capacitor on the soft start (SS) pin.An external capacitor on the TIMER pin determines the time for which the FET gate is controlled to be high when maximum inrush current flows. The ADM1073 employs a limited consecutive retry scheme, whereby, if the load capacitance is not fully charged within one attempt, the FET gate is pulled low and retries after a cooling period.APPLICATIONS Central office switching Telecommunication and data communication equipment ?48 V distributed power systems Negative power supply control High availability servers ?48 V power supply modules Disk arrays

The ADM1185 is an integrated, 4-channel, voltage monitoring and sequencing device. A 2.7 V to 5.5 V power supply is required on the VCC pin to power the device.Four precision comparators monitor four voltage rails. All comparators have a 0.6 V reference with a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the trip points for the monitored supply rails.A digital core interprets the status of the comparator outputs.Internal time delays can be used for sequencing the startup of subsequent power supplies enabled by the outputs. Supplies falling out of range are also detected and, as a result, appropriate outputs are disabled.The ADM1185 has four open-drain outputs. In a typical configuration, OUT1 to OUT3 are used to enable power supplies, while PWRGD is a common power-good output, indicating the status of all monitored supplies.The ADM1185 is available in a 10-lead mini small outline package (MSOP).APPLICATIONS Monitor and alarm functions Power supply sequencing Telecommunication and data communication equipment PCs/servers

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1260 Super Sequencer? is a configurable supervisory/sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems.A high speed interchip bus (ICB) allows multiple devices to be easily linked together. It is possible to create a system capable of sequencing up to 40 supplies and monitoring up to 37 supplies. Using the ADI Power Studio? software, the operation of the ICB is transparent to the user, making multiple devices appear to operate as a single virtual sequencer.In addition to these functions, the ADM1260 integrates a 12-bit analog-to-digital converter (ADC) and six 8-bit voltage output digital-to-analog converters (DACs). Use the ADC and the DACs to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or the reference of a dc-to-dc converter using the DAC outputs.Supply margining can be performed with a minimum of external components. The margining loop can be used for in-circuit testing of a board during production (for example, to verify board functionality at ?5% of nominal supplies), or it can be used dynamically to accurately control the output voltage of a dc-to-dc converter.The device also provides up to 10 programmable inputs for monitoring undervoltage faults, overvoltage faults, or out of window faults on up to 10 supplies. In addition, 10 programmable outputs can be used as logic enables. Six of these programmable outputs can also provide an output of up to 12 V for driving the gate of an N-FET that can be placed in the path of a supply.The logical core of the device is a sequencing engine (SE). This state machine-based construction provides up to 61 different states. This design enables very flexible sequencing of the outputs, based on the condition of the inputs.A block of nonvolatile EEPROM is available that can be used to store user defined information and can also be used to hold a number of fault records that are written by the sequencing engine, as defined by the user when a particular fault or sequence occurs.The device is controlled via configuration data that can be programmed into an EEPROM. The entire configuration can be programmed using an intuitive graphical user interface (GUI)-based software package provided by Analog Devices, Inc., the ADI Power Studio software.Applications Central office systems Servers/routers Multivoltage system line cards Digital signal processor (DSP)/field programmable gate array (FPGA) supply sequencing In-circuit testing of margined supplies