DC1058A-A: Demo Board for the LT1994 Low Noise, Low Distortion Fully Differential Input/Output Amplifier/Driver and LTC2203 16-Bit, 25Msps ADCs.

DC1058A-E: Demo Board for the LTC2207 16-Bit, 105Msps ADC and LTC6406 3GHz, Low Noise, Rail-to-Rail Input Differential Amplifier/Driver.

DC1061A: Demo Board for the LTC3552 Standalone Linear Li-Ion Battery Charger and Dual Synchronous Buck Converter.

DC1063A: Demo Board for the LT6559 Low Cost 5V/±5V 300MHz Triple Video Amplifier in 3mm × 3mm QFN.

The AD8353 is a broadband, fixed-gain, linear amplifier that operates at frequencies from 1 MHz up to 2.7 GHz. It is intended for use in a wide variety of wireless devices, including cellular, broadband, CATV, and LMDS/MMDS applications.By taking advantage of ADI?s high performance, complementary Si bipolar process, these gain blocks provide excellent stability over process, temperature, and power supply. This amplifier is single-ended and internally matched to 50 ? with a return loss of greater than 10 dB over the full operating frequency range.The AD8353 provides linear output power of 9 dBm with 20 dB of gain at 900 MHz when biased at 3 V and an external RF choke is connected between the power supply and the output pin. The dc supply current is 42 mA. At 900 MHz, the output third-order intercept (OIP3) is greater than 23 dBm and is 19 dBm at 2.7 GHz.The noise figure is 5.3 dB at 900 MHz. The reverse isolation (S12) is ?36 dB at 900 MHz and ?30 dB at 2.7 GHz.The AD8353 can also operate with a 5 V power supply; in which case, no external inductor is required. Under these conditions, the AD8353 delivers 8 dBm with 20 dB of gain at 900 MHz. The dc supply current is 42 mA. At 900 MHz, the OIP3 is greater than 22 dBm and is 19 dBm at 2.7 GHz. The noise figure is 5.6 dB at 900 MHz. The reverse isolation (S12) is ?35 dB.The AD8353 is fabricated on ADI?s proprietary, high performance, 25 GHz, Si complementary, bipolar IC process. The AD8353 is available in a chip scale package that uses an exposed paddle for excellent thermal impedance and low impedance electrical connection to ground. It operates over a ?40?C to +85?C temperature range, and an evaluation board is also available.Applications VCO buffers General Tx/Rx amplification Power amplifier predrivers Low power antenna drivers

The AD8450 is a precision analog front end for testing andmonitoring battery cells. Referring to figure one, a precisionprogrammable gain instrumentation amplifier (PGIA)measures the battery?s charge/discharge current and aprogrammable gain difference amplifier (PGDA) measures thebattery?s voltage. Internal laser trimmed resistor networks setthe gains for the PGIA and the PGDA, optimizing the AD8450?sperformance over the rated temperature range. PGIA gains are26?, 66?, 133?, and 200?. PGDA gains are 0.2?, 0.27?,0.4?,and 0.8?.Voltages at the ISET and VSET inputs set the desired constantvoltage (CV) and constant current (CC) values. CC to CVswitching is automatic and transparent to the system.A TTL level logic input, MODE, selects between charge anddischarge modes (high for charge, low for discharge). An analogoutput, VCTRL, interfaces directly with ADI?s ADP1972?&ADP1974?PWM controllers.The AD8450 includes resistor programmable overvoltage andovercurrent detection and current sharing circuitry. Currentsharing is used to balance charge among multiple batteries.The AD8450 simplifies designs by providing excellent accuracy,performance over temperature, flexibility with functionality,and overall reliability in a space-saving package. The AD8450 isavailable in an 80 lead 14 mm ?14 mm ? 1 mm LQFP packageand is rated at ?40 ?C to +85 ?C operating temperature.APPLICATIONS Battery cell testing & formation Battery module testing

The AD9114/AD9115/AD9116/AD9117 are pin-compatible dual, 8-/10-/12-/14-bit, low power digital-to-analog converters (DACs) that provide a sample rate of 125 MSPS. These TxDAC? converters are optimized for the transmit signal path of communication systems. All the devices share the same interface, package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost.The AD9114/AD9115/AD9116/AD9117 offer exceptional ac and dc performance and support update rates up to 125 MSPS.The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9114/AD9115/AD9116/AD9117 make them well suited for portable and low power applications.PRODUCT HIGHLIGHTS Low Power. DACs operate on a single 1.8 V to 3.3 V supply; total power consumption reduces to 225 mW at 100 MSPS. Sleep and power-down modes are provided for low power idle periods. CMOS Clock Input. High speed, single-ended CMOS clock input supports a 125 MSPS conversion rate. Easy Interfacing to Other Components. Adjustable output common mode from 0 V to 1.2 V allows for easy interfacing to other components that accept common-mode levels greater than 0 V.?APPLICATIONS Wireless infrastructures Picocell, femtocell base stations Medical instrumentation Ultrasound transducer excitation Portable instrumentation Signal generators, arbitrary waveform generators

The AD9119/AD9129 are high performance, 11-/14-bit RF digital-to-analog converters (DACs) supporting data rates up to 2.85 GSPS. The DAC core is based on a quad-switch architecture that enables dual-edge clocking operation, effectively increasing the DAC update rate to 5.7 GSPS when configured for Mix-Mode? or 2? interpolation. The high dynamic range and bandwidth enable multicarrier generation up to 4.2 GHz.In baseband mode, wide bandwidth capability combines with high dynamic range to support from 1 to 158 contiguous carriers for CATV infrastructure applications. A choice of two optional 2? interpolation filters is available to simplify the postreconstruction filter by effectively increasing the DAC update rate by a factor of 2. In Mix-Mode operation, the AD9119/AD9129 can reconstruct RF carriers in the second and third Nyquist zone while still maintaining exceptional dynamic range up to 4.2 GHz. The high performance NMOS DAC core features a quad-switch architecture that enables industry-leading direct RF synthesis performance with minimal loss in output power. The output current can be programmed over a range of 9.5 mA to 34.4 mA.The AD9119/AD9129 include several features that may further simplify system integration. A dual-port, source synchronous LVDS interface simplifies the data interface to a host FPGA/ASIC. A differential frame/parity bit is also included to monitor the integrity of the interface. On-chip delay locked loops (DLLs) optimize timing between different clock domains.A serial peripheral interface (SPI) configures the AD9119/ AD9129 and monitors the status of readback registers. The AD9119/AD9129 are manufactured on a 0.18 ?m CMOS process and operates from +1.8 V and ?1.5 V supplies. It is supplied in a 160-ball chip scale package ball grid array.Product Highlights High dynamic range and signal reconstruction bandwidth support RF signal synthesis of up to 4.2 GHz. Dual-port interface with double data rate (DDR) LVDS data receivers supports 2850 MSPS maximum conversion rate. Manufactured on a CMOS process; a proprietary switching technique enhances dynamic performance.Applications Broadband communications systems CMTS/VOD Wireless infrastructure: W-CDMA, LTE, point-to-point Instrumentation, automatic test equipment (ATE) Radar, jammers

The AD9139 is a 16-bit, high dynamic range digital-to-analogconverter (DAC) that provides a maximum update rate of 1600 MSPS,permitting multicarrier generation up to the Nyquist frequency.The AD9139 TxDAC+? includes features optimized for wide bandcommunications applications, including 1? and 2? interpolation, aDLL based high speed interface, sample error detection, andparity detection. A 3-wire serial port interface provides for theprogramming/readback of many internal parameters. Full-scaleoutput current can be programmed over a range of 9 mA up to33 mA. The AD9139 is available in a 72-lead LFCSP.PRODUCT HIGHLIGHTS 575 MHz achievable input signal bandwidth. Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies. Very small inherent latency variation simplifies both software and hardware design in the system. It allows easy multichip synchronization for most applications. Low power architecture improves power efficiency.APPLICATIONS Wireless communications: 3G/4G and MC-GSM base stations, wideband repeaters, software defined radios Wideband communications: point-to-point, LMDS/MMDS Transmit diversity/MIMO Instrumentation Automated test equipment

The AD9162 is a high performance, 16-bit digital-to-analog converter (DAC) that supports data rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2? interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.In baseband mode, wide bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of two carriers to full maximum spectrum of 1.794 GHz. A 2? interpolator filter (FIR85) enables the AD9161/AD9162 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode? operation, the AD9161/AD9162 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9161/AD9162 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.A serial peripheral interface (SPI) can configure the AD9161/AD9162 and monitor the status of all registers. The AD9161/AD9162 are offered in an 165-ball, 8.0 mm ? 8.0 mm, 0.5 mm pitch, CSP_BGA package and in an 169-ball, 11 mm ? 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option for the AD9162.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance with margin.Applications Broadband communications systems DOCSIS 3.1 cable modem termination system (CMTS)/video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point Instrumentation, automatic test equipment (ATE) Radars and jammers