The HMC720LP3E is a 1:2 Fanout Buffer designed to support data transmission rates up to 14 Gbps, and clock frequencies as high as 14 GHz.All differential inputs to the HMC720LP3E are CML and terminated on-chip with 50 Ohms to the positive supply, GND, and may be DC or AC coupled. Outputs can be connected directly to a 50 Ohm ground-terminated system or drive devices with CML logic input. The HMC720LP3E also features an ouput level control pin, VR, which allows for loss compensation or signal level optimization. The HMC720LP3E operates from a single -3.3 V supply and is available in ROHS-compliant 3x3 mm SMT package.?APPLICATIONS 16 G Fiber Channel RF ATE Applications Broadband Test & Measurement Serial Data Transmission?up to 13 Gbps Clock Buffering up to 13 GHz

The HMC613LC4B is a Successive Detection Log Video Amplifier (SDLVA) which operates from 0.1 to 20 GHz. The HMC613LC4B provides a logging range of 59 dB. This device offers typical fast rise/fall times of 4/18 ns and a superior delay time of 14 ns. The HMC613LC4B log video output slope is typically 14 mV/dB. Maximum recovery times are less than 30 ns. The HMC613LC4B is available in a highly compact 4x4 mm SMT ceramic package and is ideal for high speed channelized receiver applications.APPLICATIONS EW, ELINT & IFM Receivers DF Radar Systems ECM Systems Broadband Test & Measurement Power Measurement & Control Circuits Military & Space Applications

The HMC724 is a 1:2 Fanout Buffer designed to support data transmission rates up to 14 Gbps, and clock frequencies as high as 14 GHz. All differential inputs and outputs are DC coupled and terminated on chip with 50 Ohm resistors to ground. The outputs may be used in either single ended or differential modes, and should be AC or DC coupled into 50 Ohm resistors connected to ground.All differential inputs to the HMC724 are CML and terminated on-chip with 50 Ohms to the positive supply, GND, and may be DC or AC coupled. The differential CMl outputs are source terminated to to 50 Ohms and may also be AC or DC coupled. Outputs can be connected directly to a 50 Ohm ground-terminated system or drive devices with CML logic input. The HMC724 operates from a single -3.3 V supply and is available in ROHS-compliant 3x3 mm SMT package.APPLICATIONS 16 G Fiber Channel RF ATE Applications Broadband Test & Measurement Serial Data Transmission up to 14 Gbps Clock Buffering up to 14 GHz

The HMC854LC5 is a 4:1 multiplexer designed for 28 Gbps data serialization. The mux latches the four differential inputs on a rising edge of the input clock. The device uses both rising and falling edges of the half-rate clock to serialize the data. A quarter-rate clock output generated on chip can be used to synchronize data into the mux. The mux is DC coupled supporting broadband operation.All clock and data inputs to the HMC854LC5 are CML and terminated on-chip with 50 Ohms to the positive supply, GND, and may be DC or AC coupled. The differential outputs are source terminated to 50 Ohms and may also be AC or DC coupled. Outputs can be connected directly to a 50 Ohm ground terminated system, or drive devices with CML logic input. The HMC854LC5 also features an output level control pin, VR, which allows for loss compensation or signal level optimization. The HMC854LC5 operates from a single -3.3V supply and is available in ROHS compliant 5x5 mm SMT package.APPLICATIONS SONET OC-192 Broadband Test & Measurement Serial Data Transmission?up to 28 Gbps Mux Modes: 4:1 @ 28 Gbps NRZ 2:1 @ 14 Gbps RZ and NRZ FPGA Interfacing

The AD5372 / AD5373?contain 32, 16-bit or 14-bit digital-to-analog converters (DACs) in a single 64-lead LQFP. The devices provide buffered voltage outputs with a nominal span of 4? the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. For even greater flexibility, the device is divided into four groups of eight DACs. Two offset DACs allow the output range of the groups to be altered. Group 0 can be adjusted by Offset DAC 0, and Group 1 to Group 3 can be adjusted by Offset DAC 1.The AD5372 / AD5373 offer guaranteed operation over a wide supply range: VSS from ?16.5 V to ?4.5 V and VDD from 9 V to 16.5 V. The output amplifier headroom requirement is 1.4 V operating with a load current of 1 mA.The AD5372 / AD5373 have a high-speed serial interface, which is compatible with SPI, QSPI?, MICROWIRE?, and DSP interface standards and can handle clock speeds of up to 50 MHz.The DAC registers are updated on reception of new data. All the outputs can be updated simultaneously by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register.Each DAC output is gained and buffered on-chip with respect to an external SIGGNDx input. The DAC outputs can also be switched to SIGGNDx via the CLR pin.APPLICATIONS Level setting in automatic test equipment (ATE) Variable optical attenuators (VOA) Optical switches Industrial control systems Instrumentation

The AD5390?/ AD5391?are complete single-supply, 16-channel, 14-bit and 12-bit DACs, respectively. The AD5392 is a complete single-supply, 8-channel, 14-bit DAC. The devices are available in either a 64-lead LFCSP or a 52-lead LQFP. All channels have an on-chip output amplifier with rail-to-rail operation. All devices include an internal 1.25/2.5 V, 10 ppm/?C reference, an on-chip channel monitor function that multiplexes the analog outputs to a common MON_OUT pin for external monitoring, and an output amplifier boost mode that optimizes the output amplifier slew rate.The AD5390 / AD5391 / AD5392 contain a 3-wire serial interface with interface speeds in excess of 30 MHz that are compatible with SPI?, QSPI?, MICROWIRE?, and DSP interface standards and an I2C-compatible interface supporting a 400 kHz data transfer rate.An input register followed by a DAC register provides double-buffering, allowing DAC outputs to be updated independently or simultaneously using the LDAC input. Each channel has a programmable gain and offset adjust register, letting the user fully calibrate any DAC channel.Power consumption is typically 0.25 mA per channel.APPLICATIONS Instrumentation and industrial control Power amplifier control Level setting (ATE) Control systems Microelectromechanical systems (MEMS) Variable optical attenuators (VOAs) Optical transceivers (MSA 300, XFP)

The AD5522 is a high performance, highly integrated parametric measurement unit consisting of four independent channels. Each per-pin parametric measurement unit (PPMU) channel includes five 16-bit, voltage output DACs that set the programmable input levels for the force voltage inputs, clamp inputs, and comparator inputs (high and low). Five programmable force and measure current ranges are available, ranging from ?5 ?A to ?80 mA. Four of these ranges use on-chip sense resistors; one high current range up to ?80 mA is available per channel using off-chip sense resistors. Currents in excess of ?80 mA require an external amplifier. Low capacitance DUT connections (FOH and EXTFOH) ensure that the device is suited to relayless test systems.The PMU functions are controlled via a simple 3-wire serial interface compatible with SPI, QSPI?, MICROWIRE?, and DSP interface standards. Interface clocks of 50 MHz allow fast updating of modes. The low voltage differential signaling (LVDS) interface protocol at 83 MHz is also supported. Comparator outputs are provided per channel for device go-no-go testing and characterization. Control registers allow the user to easily change force or measure conditions, DAC levels, and selected current ranges. The SDO (serial data output) pin allows the user to read back information for diagnostic purposes. APPLICATIONS Automatic Test Equipment (ATE) Per pin Parametric Measurement Unit Continuity & Leakage Testing Device Power Supply Instrumentation SMU (Source Measure Unit) Precision Measurement

The AD5592R/AD5592R-1 have eight I/Ox pins (I/O0 to I/O7) that can be independently configured as digital-to-analog converter (DAC) outputs, analog-to-digital converter (ADC) inputs, digital outputs, or digital inputs. When an I/Ox pin is configured as an analog output, it is driven by a 12-bit DAC. The output range of the DAC is 0 V to VREF or 0 V to 2 ? VREF.When an I/Ox pin is configured as an analog input, it is connected to a 12-bit ADC via an analog multiplexer. The input range of the ADC is 0 V to VREF or 0 V to 2 ? VREF. The ADC has a total throughput rate of 400 kSPS. The I/Ox pins can also be configured as digital, general-purpose input or output (GPIO) pins. The state of the GPIO pins can be set or read back by accessing the GPIO write data register or the GPIO read configuration register, respectively, via a serial peripheral interface (SPI) write or read operation.The AD5592R/AD5592R-1 have an integrated 2.5 V, 25 ppm/?C reference, which is turned off by default, and an integrated temperature indicator, which gives an indication of the die temperature. The temperature value is read back as part of an ADC read sequence.The AD5592R/AD5592R-1 are available in 16-ball, 2 mm ? 2 mm WLCSP, 16-lead, 3 mm ? 3 mm LFCSP, and 16-lead TSSOP. The AD5592R/AD5592R-1 operate over a temperature range of ?40?C to +105?C.Applications Control and monitoring General-purpose analog and digital inputs/outputs

The AD7626 is a 16-bit, 10 MSPS, charge redistributionsuccessive approximation register (SAR) based architectureanalog-to-digital converter (ADC). SAR architecture allowsunmatched performance both in noise (91.5 dB SNR) and inlinearity (?0.45 LSB INL). The AD7626 contains a high speed,16-bit sampling ADC, an internal conversion clock, and aninternal buffered reference. On the CNV edge, it samples thevoltage difference between the IN+ and IN? pins. The voltageson these pins swing in opposite phase between 0 V and REF.The 4.096 V reference voltage, REF, can be generated internallyor applied externally.All converted results are available on a single low voltagedifferential signaling (LVDS) self clocked or echoed clock serialinterface, reducing external hardware connections.The AD7626 is housed in a 32-lead, 5 mm ? 5 mm LFCSP withoperation specified from ?40?C to +85?C.Applications Digital imaging systems ??Digital X-ray ??Digital MRI ? CCD and IR cameras High speed data acquisition High dynamic range telecommunications receivers Spectrum analysis Test equipment

The LT3045-1 is a high performance low dropout linear regulator featuring LTC?s ultralow noise and ultrahigh PSRR architecture for powering noise sensitive applications. Designed as a precision current reference followed by a high performance voltage buffer, the LT3045-1 can be easily paralleled to further reduce noise, increase output current and spread heat on the PCB. In addition to the LT3045 feature set, the LT3045-1 incorporates a VIOC tracking function to control an upstream switching converter to maintain a constant voltage across the LT3045-1 and hence minimize power dissipation.The device supplies 500mA at a typical 260mV dropout voltage. Operating quiescent current is nominally 2.3mA and drops to <<1?A in shutdown. The LT3045-1?s wide output voltage range (0V to 15V) while maintaining unity-gain operation provides virtually constant output noise, PSRR, bandwidth and load regulation, independent of the programmed output voltage. Additionally, the regulator features programmable current limit, fast start-up capability and programmable power good to indicate output voltage regulation.The LT3045-1 is stable with a minimum 10?F ceramic output capacitor. Built-in protection includes reverse battery protection, reverse current protection, internal current limit with foldback and thermal limit with hysteresis. The LT3045-1 is available in thermally enhanced 12-Lead MSOP and 3mm ? 3mm DFN packages. ? VIOC Function LT3045-1 Yes LT3045 No Applications RF Power Supplies: PLLs, VCOs, Mixers, LNAs, PAs Very Low Noise Instrumentation High Speed/High Precision Data Converters Medical Applications: Imaging, Diagnostics Post-Regulator for Switching Supplies