The ADGS5412 contains four independent single-pole/single-throw (SPST) switches. A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features, including cyclic redundancy check (CRC) error detection, invalidread/write address detection, and serial clock (SCLK) counterror detection.It is possible to daisy-chain multiple ADGS5412 devices together,which enables the configuration of multiple devices with aminimal amount of digital lines. The ADGS5412 can also operate in burst mode to decrease the time between SPIcommands. Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the supplies are blocked. The on-resistance profile is very flat over the full analog input range, which ensures good linearity and low distortion when switching audio signals. The ADGS5412 exhibits break-before-make switching action, allowing use of the device in multiplexer applications with external wiring.PRODUCT HIGHLIGHTS SPI interface removes the need for parallel conversion and logic traces and reduces general-purpose input/output (GPIO) channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC, invalid read/write address, and SCLK count error detection ensure a robust digital interface. CRC error detection capabilities allow for the use of the ADGS5412 in safety critical systems. Guaranteed break-before-make switching allows the use of the ADGS5412 in multiplexer configurations with external wiring.Trench isolation analog switch section guards against latch-up. A dielectric trench separates the positive (P) and negative (N) channel transistors thereby preventing latch-up even under severe overvoltage conditions.APPLICATIONS Relay replacement Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems

The ADM1272 ?is a hot swap controller that allows a circuit board to be removed from or inserted into a live backplane. It also features current, voltage, and power readback via an integrated 12-bit analog-to-digital converter (ADC), accessed using a PMBus? interface. This device is able to withstand up to 120 V, which makes it very robust in surviving surges and transients commonly associated with high voltage systems, usually clamped using protection devices such as transient voltage suppressors (TVSs) that can often exceed 100 V.The load current, ILOAD, is measured using an internal current sense amplifier that measures the voltage across a sense resistor in the power path via the SENSE+ and SENSE? pins. A default current limit sense voltage of 30 mV is set, but this limit can be?adjusted down, if required, using a resistor divider network from the VCAP regulator output voltage to the ISET pin. An additional resistor can also be placed from ISET to VIN (or VOUT) to allow the current limit to track inversely with the rail voltage. This resistor allows an approximate system power limit to be used.The ADM1272 ?limits the current through the sense resistor by controlling the gate voltage of an external N channel field effect transistor (FET) in the power path. The sense voltage, and therefore the load current, is maintained below the preset maximum. The ADM1272 ?protects the external FET by monitoring and limiting the energy transfer through the FET while the current is being controlled. This energy limit is set by the choice of components connected to the EFAULT pin (for fault protection mode) and the ESTART pin during startup. Therefore, different energy limits can be set for start-up and normal fault conditions. During startup, inrush currents are maintained very low and different areas of the safe operating area (SOA) curve are of interest, whereas during fault conditions, the currents can be much higher.The controller uses the drain to source voltage (VDS) across the FET to set the current profile of the EFAULT and ESTART pins and, therefore, the amount of much energy allowed to be transferred in the FET. This energy limit ensures the MOSFET remains within the SOA limits. Optionally, use a capacitor on the DVDT pin to set the output voltage ramp rate, if required. In case of a short-circuit event, a fast internal overcurrent detector responds in hundreds of ns and signals the gate to shut down. A 1.5 A pull-down device ensures a fast FET response. The gate then recovers control within 50 ?s to ensure minimal disruption during conditions, such as line steps and surges. The?ADM1272 ?features overvoltage (OV) and undervoltage (UV) protection, programmed using external resistor dividers on the UVH, UVL, and OV pins. The use of two pins for undervoltage allows independent accurate rising and falling thresholds. The PWRGD output pin signals when the output voltage is valid and the gate is sufficiently enhanced. The validity of VOUT is determined using the PWGIN pin.The 12-bit ADC measures the voltage across the sense resistor, the supply voltage on the SENSE+ pin, the output voltage, and the temperature using an external NPN/PNP device. A PMBus interface allows a controller to read data from the ADC. As many as 16 unique I2C addresses can be selected, depending on how the two ADRx pins are connected. The?ADM1272 is available in a custom 48-lead LFCSP (7 mm ? 8 mm) with a pinstrap mode that allows the device to be configured for automatic retry or latchoff when an overcurrent (OC) fault occurs.Applications 48 V/54 V systems Servers Power monitoring and control/power budgeting Central office equipment Telecommunication and data communication equipment Industrial applications

The ADM2582E / ADM2587E are fully integrated signal and power isolated data transceivers with ?15 kV ESD protection and are suitable for high speed communication on multipoint transmission lines. The ADM2582E / ADM2587E include an integrated isolated dc-to-dc power supply, which eliminates the need for an external dc-to-dc isolation block.They are designed for balanced transmission lines and comply with ANSI/TIA/EIA-485-A-98 and ISO 8482:1987(E).The devices integrate Analog Devices, Inc., iCoupler? technology to combine a 3-channel isolator, a three-state differential line driver, a differential input receiver, and Analog Devices isoPower dc-to-dc converter into a single package. The devices are powered by a single 5 V or 3.3 V supply, realizing a fully integrated signal and power isolated RS-485 solution.The ADM2582E / ADM2587E driver has an active high enable. An active low receiver enable is also provided that causes the receiver output to enter a high impedance state when disabled.The devices have current limiting and thermal shutdown features to protect against output short circuits and situations where bus contention may cause excessive power dissipation. The parts are fully specified over the industrial temperature range and are available in a highly integrated, 20-lead, wide-body SOIC package.The ADM2582E / ADM2587E contain isoPower technology that uses high frequency switching elements to transfer power through the transformer. Special care must be taken during printed circuit board (PCB) layout to meet emissions standards. Refer to Application Note AN-0971, Control of Radiated Emissions with isoPower Devices, for details on board layout considerations.APPLICATIONSIsolated RS-485/RS-422 interfacesIndustrial field networksMultipoint data transmission systems

The ADM2861E, ADM2863E, ADM2865E, and ADM2867E are 5.7 kV rms signal and power isolated RS-485 transceivers. These devices are designed for balanced transmission lines and comply with ANSI/TIA/EIA-485-A-98 and ISO 8482:1987(E). The devices pass radiated emissions testing to the EN 55032 Class B standard with margin on a 2-layer printed circuit board (PCB) using two small external 0402 ferrites on isolated power and ground pins. The device features an integrated, low electromagnetic interference (EMI), isolated dc-to-dc converter, which eliminates the need for an external isolated power supply. The isolation barrier provides immunity to system level electromagnetic compatibility (EMC) standards. The family of isolator devices features ?12 kV contact and ?15 kV air IEC61000-4-2 ESD protection on the RS-485 A, B, Y, and Z pins. The devices also features cable invert pins, allowing the user to quickly correct reversed cable connection on the A, B, Y, and Z bus pins while maintaining full receiver fail-safe performance.Slew rate limited versions are available, which are optimized for low speed over long cable runs, and have a maximum data rate of 500 kbps. Half duplex and full duplex variants are available. The full duplex generics allow independent cable inversion of the driver and receiver for additional flexibility.Applications Heating, ventilation, and air conditioning (HVAC) networks Industrial field buses Building automation Utility networks Energy meters

The HMC832A is a 3.3 V, high performance, wideband, fractional-N, phase-locked loop (PLL) that features an integrated voltage controlled oscillator (VCO) with a fundamental frequency of 1500 MHz to 3000 MHz and an integrated VCO output divider (divide by 1, 2, 4, 6, ? 62) that enables the HMC832A to generate continuous frequencies from 25 MHz to 3000 MHz. The integrated phase detector (PD) and ?-? modulator, capable of operating at up to 100 MHz, permit wider loop bandwidths and faster frequency tuning with excellent spectral performance.Industry leading phase noise and spurious performance, across all frequencies, enable the HMC832A to minimize blocker effects, and to improve receiver sensitivity and transmitter spectral purity. A low noise floor (?160 dBc/Hz) eliminates any contribution to modulator/mixer noise floor in transmitter applications.The HMC832A is footprint compatible to the market leading HMC830 PLL with an integrated VCO. It features 3.3 V supply and an innovative programmable performance technology that enables the HMC832A to tailor current consumption and corresponding noise floor performance to individual applications by selecting either a low current consumption mode or a high performance mode for an improved noise floor performance.Additional features of the HMC832A include 12 dB of RF output gain control in 1 dB steps; an output mute function to automatically mute the output during frequency changes when the device is not locked; selectable output return loss; programmable differential or single-ended outputs, with the ability to select either output in single-ended mode; and a ?-? modulator exact frequency mode that enables users to generate output frequencies with 0 Hz frequency error; and a register configurable 3.3 V or 1.8 V serial port interface (SPI).Applications Cellular infrastructure Microwave radios WiMax, WiFi Communications test equipment CATV equipment DDS replacement Military Tunable reference sources for spurious-free performance

The HMC1032LP6GE is a low-noise, wide-band clock generator IC with a fractional-N Phase Locked Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO). The device provides differential clock outputs between 125 and 350 MHz range. The HMC1032LP6GE features low noise Phase Detector (PD) and Delta-Sigma modulator, capable of operating at up to 100 MHz, permit wider loop-bandwidths with excellent spectral performance.The HMC1032LP6GE features industry leading phase noise and jitter performance, across the operating range, that enable it to improve link level jitter performance, Bit-Error-Rates (BER) and eye diagram metrics. The superior noise floor (<-165 dBc/Hz) makes the HMC1032LP6GE an ideal source for a variety of applications ?such as clock references for high speed data converters, physical layer devices (PHY), serializer/deserializer (SERDES) circuits, FPGAs and processors. The HMC1032LP6GE can also be used as reference clock and LO for 1G/10G Ethernet line cards as well as jitter attenuation and frequency translation.The differential output of the HMC1032LP6GE includes a 2-bit output amplitude control which may be set via the SPI serial programming interface, and an output Mute function. The Delta-Sigma Modulator of the HMC1032LP6GE features Hittite?s Exact Frequency Mode, which enables users to generate output frequencies with close to 0 Hz frequency error.APPLICATIONS 1G/10G Ethernet Line Cards OTN & SONET/SDH Applications High Frequency Processor Clocks Low Jitter SAW Oscillator?Replacement Fiber Channel Interface Clocks Cellular/4G Infrastructure DDS Replacement 10G Optical Modules,?Transponders, Line Cards

The HMC525ALC4 is a compact gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), in phase quadrature (I/Q) mixer in a 24-terminal, RoHS compliant, ceramic leadless chip carrier (LCC) package. The device can be used as either an image reject mixer or a single sideband (SSB) upconverter. The mixer uses two standard double balanced mixer cells and a 90? hybrid fabricated in a GaAs, metalsemiconductor field effect transistor (MESFET) process. The HMC525ALC4 is a much smaller alternative to a hybrid style image reject mixer and a SSB upconverter assembly. The HMC525ALC4 eliminates the need for wire bonding, allowing the use of surface-mount manufacturing techniques. Applications Microwave and very small aperture terminal radios Test equipment Point to point radios Military electronic warfare; electronic countermeasure; and command, control, communications, and intelligence

The HMC618ALP3E is a GaAs pHEMT MMIC Low Noise Amplifier that is ideal for Cellular/3G and LTE/WiMAX/4G basestation front-end receivers operating between 1.2 - 2.2 GHz. The amplifier has been optimized to provide 0.75 dB noise figure, 19 dB gain and +36 dBm output IP3 from a single supply of +5V. Input and output return losses are excellent and the LNA requires minimal external matching and bias decoupling components. The HMC618ALP3E shares the same package and pinout with the HMC617LP3E 0.55 - 1.2 GHz LNA. The HMC618ALP3E can be biased with +3V to +5V and features an externally adjustable supply current which allows the designer to tailor the linearity performance of the LNA for each application. The HMC618ALP3E offers improved noise figure versus the previously released HMC375LP3(E) and the HMC382LP3(E).Applications Cellular/3G and LTE/WiMAX/4G BTS & Infrastructure Repeaters and Femto Cells Public Safety Radio

The ADRF8800/ADRF8850 are low power, integrated systems on chip (SoC) that include a 2.4 GHz (industrial scientific medical) ISM band radio and an embedded microcontroller unit (MCU) subsystem.The ADRF8800/ADRF8850 provide wireless communications between the battery cell monitoring chip and the battery management system (BMS) controller. In the wireless battery management system (wBMS), the ADRF8800 nodes reside at the battery cells and take sensor data from the battery cell monitors. The nodes send the data over the air to an ADRF8850 network manager, and the manager provides the data to the BMS controller. The ADRF8850 network manager configures the network of nodes and manages the communications protocol.The embedded MCUs integrate static random access memory (SRAM), embedded flash memory, one-time programmable (OTP) memory, and an analog subsystem that provides clocking and reset.The ADRF8800/ADRF8850 has a rich set of peripherals, including serial peripheral interface (SPI), general-purpose input and output (GPIOs) ports, universal asynchronous receiver/transmitter (UART), and Joint Test Action Group (JTAG) port, as well as an analog-to-digital converter (ADC) and temperature sensor.The ADRF8800/ADRF8850 provide secure boot using software stored in read only memory (ROM) that authenticates the next boot stage using a hardware accelerated 256-bit elliptic curve cryptography (ECC-256) engine. Other hardware accelerated cryptographic features include the 128-bit advanced encryption standard (AES-128), 256-bit advanced encryption standard (AES-256), and Secure Hash Algorithm 256 (SHA-256). The ADRF8800/ADRF8850 have protected key storage with a root encrypted key generated on-chip that is only accessible to the on-chip hardware. The devices incorporate a true random number generator (TRNG) that is used to seed a National Institute of Standards and Technology (NIST) certified deterministic random bit generator (DRBG). The ADRF8800/ADRF8850 also include support for secure firmware updates with rollback protection. The in-field OTP memory is included to enforce the access control of debug ports and memory access once a device is ready for deployment.The ADRF8800/ADRF8850 feature on-chip, low dropout (LDO) regulators that allow the devices to be powered by a single 3.3 V nominal supply, provided by an external power management IC (PMIC) either stepping down from a high voltage bus or a 12 V battery.Each ADRF8800/ADRF8850 uses a single 40 MHz crystal to provide precision timing for the system.The ADRF8800/ADRF8850 are available in a 7 mm ? 7 mm body size, 48-lead LQFP_EP package, measuring 9 mm ? 9 mm when leads are included.APPLICATIONS Wireless Battery Management Systems

The AD7294-2 contains all the functions that are required for general-purpose monitoring and control of current, voltage, and temperature, integrated into a single-chip solution. The part includes low voltage (?200 mV) analog input sense amplifiers for current monitoring across shunt resistors, temperature sense inputs, and four uncommitted analog input channels multiplexed into a SAR analog-to-digital converter (ADC) with a 3 ?s conversion time. A high accuracy internal reference is provided to drive both the digital-to-analog converters (DACs) and the ADC. Four 12-bit DACs provide the outputs for voltage control. The AD7294-2 also includes limit registers for alarm functions. The part is designed for high voltage compliance: 59.4 V on the current sense inputs and up to a 15 V DAC output voltage.The AD7294-2 is a highly integrated solution that offers all the functionality necessary for precise control of the power amplifier in cellular base station applications. In these types of applications, the DACs provide 12-bit resolution to control the bias currents of the power transistors. Thermal diode-based temperature sensors are incorporated to compensate for temperature effects. The ADC monitors the high-side current and temperature. This functionality is provided in a 64-lead TQFP, which operates over a temperature range of ?40?C to +105?C.APPLICATIONS Cellular base stations GSM, EDGE, UMTS, CDMA, TD-SCDMA, W-CDMA, WiMAXM Point-to-multipoint and other RF transmission systems 12 V, 24 V, 48 V automotive applications Industrial controls