LT5512 - Mixer 1.23GHz Evaluation Board

AD3552R, LTC7000, MAX32666 - Front End, Power Amplifier Evaluation Board

The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/ outputs (GPIOs) that provide an array of digital control options are also integrated.To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9029 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.This device contains a fully integrated, low power digital predistortion (DPD) adaptation engine for use in power amplifier linearization. DPD enables use of high efficiency power amplifiers, reducing the power consumption of base station radios while also reducing the number of SERDES lanes necessary to interface with baseband processors.The low power crest factor reduction (CFR) engine of the ADRV9029 reduces the peak to average ratio (PAR) of the input signal, enabling higher efficiency transmit line ups while reducing the processing load on baseband processors.The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.The ADRV9029 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9029 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).APPLICATIONS3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

Demonstration circuit 1149 is a monolithic step-down DC/DC switching regulator featuring LT3680. The LT3680 can be synchronized over a 250 kHz to 2 MHz range. The demo board is designed for 5V/3.5A output from a 6.3V to 36V input.

Demonstration circuit DC2886A is a high power, high efficiency six-phase bidirectional converter featuring the LTC7871 and LTC7060. The terminals labeled VHIGH and VLOW are either inputs or outputs depending on the direction of power flow. When the switch at SW1 is in the BUCK position, VLOW provides a 14V output and VHIGH is the input with a range of 30V to 70V. When the switch is in the BOOST position, VHIGH provides a 48V output and VLOW is the input with a range of 10V to 14V. The maximum VLOW current is 180A in both directions. The maximum output power is 2.5kW when operating as a buck within the input voltage range. When operating as a boost, the maximum output power is 2.4kW when the input voltage is 14V. External airflow is required when operating at maximum power. The MOSFETs in each phase are driven by the LTC7060 half bridge driver. Each LTC7060 gate driver is placed next to the MOSFETs and receives a PWM signal from the LTC7871. The inductor current for each phase is sensed with a low 1mΩ sense resistor using a highly accurate AC/DC current sensing architecture with low power dissipation. The LTC7871’s constant-current loop provides a DC current limit for the current flowing in or out of the VLOW terminal depending on the state of the BUCK pin. This current can be programmed with the SETCUR pin and monitored with the IMON pin. The DC2886A provides a SPI compatible serial port. With a DC2026C (Linduino® One) demo board and QuikEval™ software on a host computer, the user can: Margin the regulated VLOW or VHIGH up or down. Margin the DC current limit up or down with the SETCUR pin. Adjust the frequency spread and modulation rate of the spread spectrum circuit, when spread spectrum is enabled. Monitor the operational status and faults of the LTC7871. Additional features of the DC2886A include: Pin selectable light load operating modes Buck: FCM, pulse-skipping and Burst Mode® Operation Boost: FCM and pulse-skipping SYNC and CLKOUT pins Optional jumper to enable spread spectrum modulation RUN, FAULT, PGOOD and PWNEN pins BUCK pin to externally control the direction of power flow Footprint for an optional heatsink

The AD5629R device is a low power, octal, 12-bit, buffered voltage-output DACs. It operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design.The AD5629R/AD5669R have an on-chip reference with aninternal gain of 2. The AD5629R-1/AD5669R-1 have a 1.25 V,5 ppm/?C reference, giving a full-scale output range of 2.5 V.The AD5629R-2/AD5629R-3 and the AD5669R-2/AD5669R-3have a 2.5 V 5 ppm/?C reference, giving a full-scale output rangeof 5 V depending on the option selected. Devices with 1.25 Vreference selected operate from a single 2.7 V to 5.5 V supply.Devices with 2.5 V reference selected operate from 4.5 V to 5.5 V.The on-chip reference is off at power-up, allowing the use of anexternal reference. The internal reference is enabled via asoftware write.The part incorporates a power-on reset circuit that ensures that the DAC output powers up to 0 V and remains powered up at this level until a valid write takes place. The part contains a power-down feature that reduces the current consumption of the device to 400 nA at 5 V and provides software-selectable output loads while in power-down mode for any or all DAC channels.Product Highlights Octal, 12-/16-bit DACs. On-chip 1.25 V/2.5 V, 5 ppm/?C reference. Available in 16-lead LFCSP and TSSOP, and 16-ball WLCSP. Power-on reset to 0 V or midscale. Power-down capability. When powered down, the DAC typically consumes 200 nA at 3 V and 400 nA at 5 V.Applications Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources

The AD5627R?/ AD5647R?/ AD5667R, AD5627?/ AD5667?members of the nanoDAC? family are low power, dual, 12-, 14-, 16-bit buffered voltage-out DACs with/without on-chip reference. All devices operate from a single 2.7 V to 5.5 V supply, are guaranteed monotonic by design, and have an I2C-compatible serial interface.The AD5627R / AD5647R / AD5667R have an on-chip reference. The AD5627RBCPZ, AD5647RBCPZ, and AD5667RBCPZ have a 1.25 V, 5 ppm/?C reference, giving a full-scale output range of 2.5 V; the AD56x7RBRMZ have a 2.5 V, 5 ppm/?C reference, giving a full-scale output range of 5 V. The on-chip reference is off at power-up, allowing the use of an external reference. The internal reference is enabled via a software write. The AD5667 and AD5627 require an external reference voltage to set the output range of the DAC.The AD5627R / AD5647R / AD5667R, AD5627 / AD5667 incorporate a power-on reset circuit that ensures the DAC output powers up to 0 V, and remains there until a valid write takes place.?The device contains a per-channel power-down feature that reduces the current consumption of the device to 480 nA at 5 V and provides software-selectable output loads while in power-down mode. The low power consumption of this device in normal operation makes it ideally suited to portable battery-operated equipment. The on-chip precision output amplifier enables rail-to-rail output swing.The AD5627R / AD5647R / AD5667R, AD5627 / AD5667 use a 2-wire I2C-compatible serial interface that operates in standard (100 kHz), fast (400 kHz), and high speed (3.4 MHz) modes.APPLICATIONS Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Programmable attenuators

The AD5766/AD5767 are 16-channel, 16-bit/12-bit, voltage output denseDAC? digital-to-analog converters (DACs).The DACs generate output voltage ranges from an external 2.5 V reference. Depending on the voltage range selected, the midpoint of the output span can be adjusted, allowing a minimum output voltage as low as ?20 V or a maximum output voltage of up to +14 V. Each of the 16 channels can be monitored with an integrated output voltage multiplexer.The AD5766/AD5767 have integrated output buffers that can sink or source up to 20 mA. In conjunction with these buffers, a low frequency signal can be superimposed onto each DAC output via dedicated dither pins. These dedicated dither pins simplify the system design by reducing the number of external components required for a similar external implementation, like operational amplifiers or resistors. The reduction of external components makes the AD5766/AD5767 suitable for indium phosphide Mach Zehnder modulator (InP MZM) biasing applications.The devices incorporate a power-on reset (POR) circuit that ensures that the DAC outputs are clamped to ground on power up and remain at this level until the output range of the DAC is configured. The outputs of all DACs are updated through register configuration, with the added functionality of user-selectable DAC channels to be simultaneously updated.The AD5766/AD5767 use a versatile 4-wire serial interface that operates at clock rates of up to 50 MHz for write mode and is compatible with serial peripheral interface (SPI), QSPI?, MICROWIRE?, and DSP interface standards. The AD5766/ AD5767 also contain a VLOGIC pin intended for 1.8 V/3.3 V/5 V logic.The AD5766/AD5767 are available in a 4 mm ? 4 mm WLCSP package and a 40-lead LFCSP package. The AD5766/AD5767 operate at a temperature range of ?40?C to +105?C.Applications Mach Zehnder modulator bias control Optical networking Instrumentation Industrial automation Data acquisition systems Analog output modules

The AD5940 and AD5941 are high precision, low power analog front ends (AFEs) designed for portable applications that require high precision, electrochemical-based measurement techniques, such as amperometric, voltammetric, or impedance measurements. The AD5940/AD5941 is designed for skin impedance and body impedance measurements, and works with the AD8233 AFE in a complete bioelectric or biopotential measurement system. The AD5940/AD5941 is designed for electrochemical toxic gas sensing.The AD5940/AD5941 consist of two high precision excitation loops and one common measurement channel, which enables a wide capability of measurements of the sensor under test. The first excitation loop consists of an ultra low power, dual-output string, digital-to-analog converter (DAC), and a low power, low noise potentiostat. One output of the DAC controls the noninverting input of the potentiostat, and the other output controls the noninverting input of the transimpedance amplifier (TIA). This low power excitation loop is capable of generating signals from dc to 200 Hz.The second excitation loop consists of a 12-bit DAC, referred to as the high speed DAC. This DAC is capable of generating high frequency excitation signals up to 200 kHz.The AD5940/AD5941 measurement channel features a 16-bit, 800 kSPS, multichannel successive approximation register (SAR) analog-to-digital converter (ADC) with input buffers, a built in antialias filter, and a programmable gain amplifier (PGA). An input multiplexer (mux) in front of the ADC allows the user to select an input channel for measurement. These input channels include multiple external current inputs, external voltage inputs, and internal channels. The internal channels allow diagnostic measurements of the internal supply voltages, die temperature, and reference voltages.The current inputs include two TIAs with programmable gain and load resistors for measuring different sensor types. The first TIA, referred to as the low power TIA, measures low bandwidth signals. The second TIA, referred to as the high speed TIA, measures high bandwidth signals up to 200 kHz.An ultra low leakage, programmable switch matrix connects the sensor to the internal analog excitation and measurement blocks. This matrix provides an interface for connecting external transimpedance amplifier resistors (RTIAs) and calibration resistors. The matrix can also be used to multiplex multiple electronic measurement devices to the same wearable electrodes.A precision 1.82 V and 2.5 V on-chip reference source is available. The internal ADC and DAC circuits use this on-chip reference source to ensure low drift performance for the 1.82 V and 2.5 V peripherals.The AD5940/AD5941 measurement blocks can be controlled via direct register writes through the serial peripheral interface (SPI) interface, or, alternatively, by using a preprogrammable sequencer, which provides autonomous control of the AFE chip. 6 kB of static random access memory (SRAM) is partitioned for a deep data first in, first out (FIFO) and command FIFO. Measurement commands are stored in the command FIFO and measurement results are stored in the data FIFO. A number of FIFO related interrupts are available to indicate when the FIFO is full.A number of general-purpose inputs/outputs (GPIOs) are available and controlled using the AFE sequencer. The AFE sequencer allows cycle accurate control of multiple external sensor devices.The AD5940/AD5941 operate from a 2.8 V to 3.6 V supply and are specified over a temperature range of ?40?C to +85?C. The AD5940 is packaged in a 56-lead, 3.6 mm ? 4.2 mm WLCSP. The AD5941 is packaged in a 48-lead LFCSP.APPLICATIONS Electrochemical measurements Electrochemical gas sensors Potentiostat/amperometric/voltammetry/cyclic voltammetry Bioimpedance applications Skin impedance Body impedance Continuous glucose monitoring Battery impedance

The AD7656-1 / AD7657-1?/ AD7658-1?are reduced decoupling pin- and software-compatible versions of AD7656?/ AD7657?/ AD7658. The AD7656-1 / AD7657-1 / AD7658-1 devices contain six 16-/ 14-/12-bit, fast, low power successive approximation ADCs in a package designed on the iCMOS? process (industrial CMOS). iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, which dramatically reduces power consumption and package size.The AD7656-1 / AD7657-1 / AD7658-1 feature throughput rates of up to 250 kSPS. The parts contain low noise, wide bandwidth track-and-hold amplifiers that can handle input frequencies up to 4.5 MHz.The conversion process and data acquisition are controlled using the CONVST signals and an internal oscillator. Three CONVST pins (CONVST A, CONVST B, and CONVST C) allow independent, simultaneous sampling of the three ADC pairs. The AD7656-1 / AD7657-1 / AD7658-1 have a high speed parallel and serial interface, allowing the devices to interface with microprocessors or DSPs. When the serial interface is selected, each part has a daisy-chain feature that allows multiple ADCs to connect to a single serial interface. The AD7656-1 / AD7657-1 / AD7658-1 can accommodate true bipolar input signals in the ?4 ? VREF and ?2 ? VREF ranges. Each AD7656-1 / AD7657-1 / AD7658-1 also contains an on-chip 2.5 V reference.Please visit next generation product AD7606. Recommended for new designs is the AD7656A-1 pin for pin compatible device with improved PSS robustness.PRODUCT HIGHLIGHTS Six 16-/14-/12-bit, 250 kSPS ADCs on board. Six true bipolar, high impedance analog inputs. High speed parallel and serial interfaces. Reduced decoupling requirements and reduced bill of materials cost compared with the AD7656 / AD7657 / AD7658 devices.APPLICATIONS Power line monitoring and measuring systems Instrumentation and control systems Multiaxis positioning systems