RF Switch ICs DC-6 GHZ Hi Isolation Switch

Ethernet Development Tools 5-Port 10/100 with RGMII/GMII + Fiber - Evaluation Board

DC493A: Demo Board for the LTC3830 High Power Step-Down Synchronous DC/DC Controllers for Low Voltage Operation.

Demonstration circuit 561 is a high current stepdown PolyPhaseTM converter featuring the LTC3731 three-phase synchronous buck controller. The input voltage is from 10V to 14V and output is 1.5V. DC561A-A can provide up to 180A output current with a 12-phase buck circuit, while DC561A-B is a 6-phase buck converter with up to 90A output current. An optional VID controller circuit is available on both DC561A-A and DC561A-B demo circuits for output voltage programming.

DC699A-A: Demo Board for the LTC1749 12-Bit, 80Msps Wide Bandwidth ADC.

The LT6402-20 is a low distortion, low noise differential ampli?er/ADC driver for use in applications from DC to 300MHz. The LT6402-20 has been designed for ease of use, with minimal support circuitry required. Exceptionally low input-referred noise and low distortion (with either single-ended or differential inputs) make the LT6402-20 an excellent solution for driving high speed 12-bit and 14-bit ADCs. In addition to the normal unfiltered outputs (+OUT and ?OUT), the LT6402-20 has a built-in 75MHz differential low pass filter and an additional pair of filtered outputs (+OUTFILTERED, ?OUTFILTERED) to reduce external filtering components when driving high speed ADCs. The output common mode voltage is easily set via the VOCM pin, eliminating an output transformer or AC-coupling capacitors in many applications.The LT6402-20 is designed to meet the demanding requirements of communications transceiver applications. It can be used as a differential ADC driver, a general-purpose differential gain block, or in other applications requiring differential drive. The LT6402-20 can be used in data acquisition systems required to function at frequencies down to DC.The LT6402-20 operates on a 5V supply and consumes 30mA. It comes in a compact 16-lead 3mm ? 3mm QFN package and operates over a ?40?C to 85?C temperature range.Applications Differential ADC Driver for: Imaging Communications Differential Driver/Receiver Single Ended to Differential Conversion Differential to Single Ended Conversion Level Shifting IF Sampling Receivers SAW Filter Interfacing/Buffering

The HMC1034LP6GE is a low-noise, wide-band clock generator IC with a fractional-N Phase Locked Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO). The device provides differential clock outputs between 125MHz and 3GHz range. The HMC1034LP6GE features low noise Phase Detector (PD) and Delta-Sigma modulator, capable of operating at up to 100MHz, permit wider loop-bandwidths with excellent spectral performance.The HMC1034LP6GE features industry leading phase noise and jitter performance, across the operating range, that enable it to improve link level jitter performance, Bit-Error-Rates (BER) and eye diagram metrics. The superior noise floor (<-165dBc/Hz) makes the HMC1034LP6GE an ideal source for a variety of applications?such as clock references for high speed data converters, physical layer devices (PHY), serializer/deserializer (SERDES) circuits, FPGAs and processors. The HMC1034LP6GE can also be used as an LO for 10G/40G/100G optical modules and transponders, as well as primary reference clock for 10G/40G/100G line cards, and for jitter attenuation and frequency translation.The differential output of the HMC1034LP6GE includes a 2-bit output amplitude control which may be set via the SPI serial programming interface, and an output Mute function. The Delta-Sigma Modulator of the HMC1034LP6GE features Hittite?s Exact Frequency Mode, which enables users to generate output frequencies with close to 0 Hz frequency error.APPLICATIONS 10G/40G/100G Optical Modules, Transponders,?Line Cards OTN and SONET/SDH Applications 1G/10G Ethernet Line Cards High Frequency Processor Clocks Low Jitter SAW Oscillator Replacement? Fiber Channel Interface Clocks Cellular/4G Infrastructure DDS Replacement 10G Optical Modules,?Transponders, Line Cards

The HMC1133LP5E is a 6-bit digital phase shifter which is rated from 4.0 to 7 GHz, providing 360 degrees of phase coverage, with a LSB of 5.625 degrees. The HMC1133LP5E features very low RMS phase error of 2.8 degrees and extremely low insertion loss variation of ?0.4 dB across all phase states. This high accuracy phase shifter is controlled with positive control logic of 0/+5V The HMC1133LP5E is housed in a compact 5x5 mm plastic leadless SMT package and is internally matched to 50 Ohms with no external components.Applications EW Receivers Weather & Military Radar Satellite Communications Beamforming Modules Phase Cancellation

The ADMV1018 is a silicon germanium (SiGe), microwave, upconverter and downconverter optimized for 5G radio designs operating in the 24.0 GHz to 29.5 GHz frequency range.The upconverter offers two modes of frequency translation. The device is capable of direct conversion to RF from differential baseband inphase/quadrature (I/Q) input signals, as well as single-sideband upconversion from complex intermediate frequency (IF) inputs. The differential baseband I/Q input path can be disabled, and modulated, single-ended, complex IF signals from 2 GHz to 9.5 GHz can be fed to the IF path. These signals can then be upconverted to 24.0 GHz to 29.5 GHz while rejecting the unwanted sideband by typically greater than 25 dBc. The serial port interface (SPI) provides adjustment of the quadrature phase to allow optimum sideband rejection. In addition, the SPI interface allows powering down the output envelope detector to reduce power consumption when carrier feedthrough optimization is not necessary.The downconverter offers two modes of frequency translation. The device is capable of direct quadrature demodulation to differential baseband I/Q output signals, as well as image rejection downconversion to a single-ended complex IF output carrier frequency. The I/Q baseband output common-mode voltage is programmable between 0.75 V and 2.15 V. The SPI provides fine adjustment of the quadrature phase to optimize I/Q demodulation performance. Alternatively, the baseband I/Q outputs can be disabled, and the I/Q signals can be passed through an on-chip, active balun to provide two, single-ended, complex IF outputs between 2 GHz and 9.5 GHz. When the device is used as an image rejecting downconverter, the unwanted image term is typically rejected to greater than 25 dBc. The ADMV1018 offers a square law power detector to allow monitoring of the power levels at the mixer inputs. The detector output provides closed-loop control of the RF digital step attenuator (DSA) via an external automatic gain control (AGC) loop.The ADMV1018 upconverter and downconverter is housed in a compact, thermally enhanced, 9 mm ? 8 mm, land grid array (LGA) package. This LGA package enables the ability to heat-sink the ADMV1018 from the top of the package for the most efficient thermal heatsinking. The ADMV1018 operates over the ?40?C to +95?C case temperature range.Throughout the figures in the data sheet, Rx means receiver and Tx means transmitter.APPLICATIONS5G applicationsPoint to point microwave radiosRadar and electronic warfare systemsInstrumentation and automatic test equipment (ATE)

The ADMV1139 is an silicon on isolator (SOI), microwave, upconverter and downconverter optimized for 5G radio designs operating in the 37 GHz to 48.2 GHz frequency range.Both upconverters and downconverters offer two modes of frequency translation. One mode is conversion from and/or to complex intermediate frequency (IF) signals, which then pass through an on-chip 90? IF hybrid, known as IF mode.The other mode is a direct conversion from and/or to single-ended or differential baseband inphase/quadrature (I/Q) inputs and outputs, known as baseband mode. The I/Q baseband output common-mode voltage is programmable between 0 V and 1.5 V. The SPI provides fine adjustment of the quadrature phase to optimize I/Q demodulation performance.When the device is used as an image rejecting downconverter, the unwanted image term is typically rejected to 26 dBc, before calibration. The ADMV1139 offers a square law power detector to allow monitoring of the power levels at the mixer inputs of the downconverter.The RF receive input, RF transmit output, and local oscillator (LO) interface are all single-ended and matched to 50 ?. The on-chip RF switch provides the option to combine the transmit and receive RF ports together for time division duplex (TDD) applications.The serial port interface (SPI) provides adjustment of the quadrature phase to allow optimum sideband rejection. In addition, the SPI allows powering down the output envelope detector to reduce power consumption when carrier feedthrough optimization is not necessary.The ADMV1139 upconverter and downconverter is housed in a compact, thermally enhanced, 6 mm ? 6.5 mm, ball grid array (BGA) package. This BGA package enables the ability to heat sink the ADMV1139 from the top of the package for the most efficient thermal heat sinking. The ADMV1139 operates over the ?40?C to +95?C TC range.APPLICATIONSMillimeter-wave 5G applicationsPoint to point microwave radiosRadar and electronic warfare systemsInstrumentation and automatic test equipment (ATE)