|
|
Texas Instruments
TL5001AQDR
|
Texas Instruments
TPS2214DB
|
Texas Instruments
TLC5615IDGKG4
|
Texas Instruments
UCD7231RTJT
|
Texas Instruments
DAC7551IDRNTG4
|
Texas Instruments
TL7709ACDRE4
|
Texas Instruments
SN74LV540ADBRG4
|
Texas Instruments
PT5404A
|
Texas Instruments
SN65LVDS31PWRG4
|
Texas Instruments
TWL1103GQER
|
Price |
|
|
|
|
$1.51 |
$2.21 |
|
|
|
|
|
RoHS |
|
Yes |
Yes |
Compliant |
Compliant |
Yes |
Compliant |
Compliant |
Compliant |
Compliant |
No |
Lead Status |
|
Yes |
Yes |
No |
No |
Yes |
|
|
No |
No |
No |
Duty Cycle(Max)(%) |
|
100 |
|
|
|
|
|
|
|
|
|
Topology |
|
Buck/Boost |
|
|
|
|
|
|
|
|
|
Rating |
|
Catalog |
|
Catalog |
|
Catalog |
|
|
|
Catalog |
|
Operating Temperature Range(C) |
|
-20 to 85,-40 to 125,-40 to 85 |
|
-40 to 85,0 to 70 |
|
-40 to 105 |
|
|
|
-40 to 85 |
|
Switching Frequency(Min)(kHz) |
|
50 |
|
|
|
|
|
|
|
|
|
Vout(Max)(V) |
|
50 |
|
|
|
|
|
|
|
|
|
Type |
|
Controller |
|
|
|
|
|
|
|
|
|
Vin(Min)(V) |
|
3.6 |
|
|
|
|
|
|
|
|
|
Switch Current Limit(Min)(A) |
|
3 |
|
|
|
|
|
|
|
|
|
Iq(Typ)(mA) |
|
1.1 |
|
|
|
|
|
|
|
|
|
Approx. Price (US$) |
|
0.73 | 1ku |
|
2.24 | 1ku |
|
1.40 | 1ku |
|
|
|
1.35 | 1ku |
|
Vout(Min)(V) |
|
1 |
|
|
|
|
|
|
|
|
|
Package Group |
|
PDIP,SOIC |
|
PDIP,SOIC,VSSOP |
|
USON |
|
|
|
SO,SOIC,TSSOP |
|
Vin(Max)(V) |
|
40 |
|
|
|
|
|
|
|
|
|
Iout(Max)(A) |
|
3 |
|
|
|
|
|
|
|
|
|
Switching Frequency(Max)(kHz) |
|
400 |
|
|
|
|
|
|
|
|
|
Gain Error(Max)(%FSR) |
|
|
|
0.3 |
|
0.15 |
|
|
|
|
|
Output Type |
|
|
|
Buffered Voltage |
|
Buffered Voltage |
|
|
|
|
|
Offset Error(Max)(%) |
|
|
|
N/A |
|
0.2 |
|
|
|
|
|
Interface |
|
|
|
SPI |
|
SPI |
|
|
|
|
|
Resolution(Bits) |
|
|
|
10 |
|
12 |
|
|
|
|
|
Priority |
|
|
|
1 |
|
1 |
|
|
|
|
|
INL(Max)(+/-LSB) |
|
|
|
1 |
|
1 |
|
|
|
|
|
Sample / Update Rate(MSPS) |
|
|
|
0.075 |
|
0.5 |
|
|
|
|
|
Internal Reference Drift(Max)(ppm/degC) |
|
|
|
N/A |
|
N/A |
|
|
|
|
|
Output Range Min.(mA/V) |
|
|
|
0 |
|
0 |
|
|
|
|
|
Special Features |
|
|
|
N/A |
|
SDO |
|
|
|
|
|
Power Consumption(Typ)(mW) |
|
|
|
0.75 |
|
0.27 |
|
|
|
|
|
DAC Architecture |
|
|
|
String |
|
String |
|
|
|
|
|
Output Range Max.(mA/V) |
|
|
|
5.1 |
|
5.5 |
|
|
|
|
|
Package Size |
|
|
|
mm2 |
|
mm2 |
|
|
|
mm2 |
|
Settling Time(s) |
|
|
|
12.5 |
|
5 |
|
|
|
|
|
Zero Code Error(Typ)(mV) |
|
|
|
15 |
|
12 |
|
|
|
|
|
Code to Code Glitch(Typ)(nV-sec) |
|
|
|
5 |
|
0.1 |
|
|
|
|
|
Reference |
|
|
|
Type |
|
Type |
|
|
|
|
|
DAC |
|
|
|
Channels |
|
Channels |
|
|
|
|
|
Output Signal |
|
|
|
|
|
|
|
|
|
LVDS |
|
ICC(Max)(mA) |
|
|
|
|
|
|
|
|
|
35 |
|
Function |
|
|
|
|
|
|
|
|
|
Driver |
|
ESD HBM(kV) |
|
|
|
|
|
|
|
|
|
8 |
|
No. of Tx |
|
|
|
|
|
|
|
|
|
4 |
|
Input Signal |
|
|
|
|
|
|
|
|
|
LVTTL |
|
Signaling Rate(Mbps) |
|
|
|
|
|
|
|
|
|
400 |
|