|
|
Texas Instruments
TLC339IN
|
Texas Instruments
TMS320F240PQ
|
Texas Instruments
TL750L10CLPRE3
|
Texas Instruments
OPA4137UA
|
Texas Instruments
SN75173D
|
Texas Instruments
TL034AID
|
Texas Instruments
V62/05606-01XE
|
Texas Instruments
TLV5604CDR
|
Texas Instruments
THS6204IPWPR
|
Texas Instruments
TL4050C25IDBZRG4
|
| Price |
|
$1.01 |
|
|
|
$1.06 |
|
|
$4.80 |
|
|
| RoHS |
|
Yes |
Yes |
Compliant |
Yes |
Yes |
Yes |
Compliant |
Compliant |
Yes |
Compliant |
| Lead Status |
|
Yes |
Yes |
|
Yes |
Yes |
Yes |
Yes |
No |
Yes |
|
| Package Group |
|
PDIP,SO,SOIC,TSSOP |
|
|
PDIP,SOIC |
PDIP,SO,SOIC |
PDIP,SOIC |
TSSOP,TVSOP |
SOIC,TSSOP |
HTSSOP,VQFN |
|
| Vs(Min)(V) |
|
3 |
|
|
|
|
|
|
|
10 |
|
| Rating |
|
Catalog |
|
|
Catalog |
Catalog |
Catalog |
HiRel Enhanced Product |
Catalog |
Catalog |
|
| Input Bias Current (+/-)(Max)(nA) |
|
0.002 |
|
|
|
|
|
|
|
|
|
| Approx. Price (US$) |
|
0.47 | 1ku |
|
|
1.10 | 1ku |
0.94 | 1ku |
1.94 | 1ku |
|
4.35 | 1ku |
1.40 | 1ku |
|
| tRESP Low - to - High(us) |
|
1 |
|
|
|
|
|
|
|
|
|
| Special Features |
|
N/A |
|
|
|
|
|
|
N/A |
|
|
| Vs(Max)(V) |
|
16 |
|
|
|
|
|
|
|
28 |
|
| Operating Temperature Range(C) |
|
-55 to 125 |
|
|
-40 to 85 |
0 to 70 |
-40 to 85,0 to 70 |
-40 to 85,-55 to 125 |
-40 to 85,0 to 70 |
-40 to 85 |
|
| Number of Channels(#) |
|
4 |
|
|
4 |
|
4 |
|
|
2 |
|
| Package Size |
|
mm2 |
|
|
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
|
|
| Iq per channel(Max)(mA) |
|
0.02 |
|
|
0.27 |
|
0.28 |
|
|
21 |
|
| Vos (Offset Voltage @ 25C)(Max)(mV) |
|
5 |
|
|
3 |
|
1.5 |
|
|
|
|
| Rail-to-Rail |
|
Out |
|
|
In to V+ |
|
In to V+ |
|
|
|
|
| VICR(Max)(V) |
|
15 |
|
|
|
|
|
|
|
|
|
| Output Type |
|
Open Collector |
|
|
|
|
|
LVTTL |
Buffered Voltage |
|
|
| VICR(Min)(V) |
|
0 |
|
|
|
|
|
|
|
|
|
| GBW(Typ)(MHz) |
|
|
|
|
1 |
|
1.1 |
|
|
|
|
| Offset Drift(Typ)(uV/C) |
|
|
|
|
15 |
|
10.9 |
|
|
|
|
| Input Bias Current(Max)(pA) |
|
|
|
|
100 |
|
200 |
|
|
|
|
| Slew Rate(Typ)(V/us) |
|
|
|
|
3.5 |
|
2.9 |
|
|
3800 |
|
| Total Supply Voltage(Min)(+5V=5, +/-5V=10) |
|
|
|
|
4.5 |
|
10 |
|
|
|
|
| Output Current(Typ)(mA) |
|
|
|
|
25 |
|
8 |
|
|
|
|
| Architecture |
|
|
|
|
FET |
|
FET |
|
|
Current Feedback, DSL Line Driver |
|
| CMRR(Min)(dB) |
|
|
|
|
74 |
|
75 |
|
|
|
|
| Iq per channel(Typ)(mA) |
|
|
|
|
0.22 |
|
0.217 |
|
|
|
|
| Vn at 1kHz(Typ)(nV/rtHz) |
|
|
|
|
45 |
|
41 |
|
|
|
|
| Total Supply Voltage(Max)(+5V=5, +/-5V=10) |
|
|
|
|
36 |
|
30 |
|
|
|
|
| Additional Features |
|
|
|
|
N/A |
|
N/A |
|
|
|
|
| CMRR(Typ)(dB) |
|
|
|
|
84 |
|
94 |
|
|
|
|
| Fail Safe |
|
|
|
|
|
Open |
|
|
|
|
|
| Number of Nodes |
|
|
|
|
|
32 |
|
|
|
|
|
| Fault Protection(V) |
|
|
|
|
|
-10 to 15 |
|
|
|
|
|
| Supply Voltage(s)(Nom)(V) |
|
|
|
|
|
5 |
|
|
|
|
|
| No. of RX |
|
|
|
|
|
4 |
|
|
|
|
|
| Common Mode Range |
|
|
|
|
|
-7 to 12 |
|
|
|
|
|
| No. of TX |
|
|
|
|
|
0 |
|
|
|
|
|
| Duplex |
|
|
|
|
|
N/A |
|
|
|
|
|
| Isolated |
|
|
|
|
|
No |
|
|
|
|
|
| HBM ESD(kV) |
|
|
|
|
|
2 |
|
|
|
|
|
| Signaling Rate(Max)(Mbps) |
|
|
|
|
|
10 |
|
|
|
|
|
| ICC(Max)(mA) |
|
|
|
|
|
70 |
|
|
|
|
|
| Bits(#) |
|
|
|
|
|
|
|
8 |
|
|
|
| ICC @ Nom Voltage(Max)(mA) |
|
|
|
|
|
|
|
30 |
|
|
|
| Schmitt Trigger |
|
|
|
|
|
|
|
No |
|
|
|
| VCC(Max)(V) |
|
|
|
|
|
|
|
3.45 |
|
|
|
| Input Type |
|
|
|
|
|
|
|
LVTTL |
|
|
|
| Output Drive (IOL/IOH)(Max)(mA) |
|
|
|
|
|
|
|
-12/12 |
|
|
|
| Technology Family |
|
|
|
|
|
|
|
VME |
|
|
|
| tpd @ Nom Voltage(Max)(ns) |
|
|
|
|
|
|
|
14.5 |
|
|
|
| Voltage(Nom)(V) |
|
|
|
|
|
|
|
3.3 |
|
|
|
| VCC(Min)(V) |
|
|
|
|
|
|
|
3.15 |
|
|
|
| F @ Nom Voltage(Max)(Mhz) |
|
|
|
|
|
|
|
120 |
|
|
|
| Offset Error(Max)(%) |
|
|
|
|
|
|
|
|
N/A |
|
|
| Code to Code Glitch(Typ)(nV-sec) |
|
|
|
|
|
|
|
|
10 |
|
|
| Interface |
|
|
|
|
|
|
|
|
SPI |
|
|
| Resolution(Bits) |
|
|
|
|
|
|
|
|
10 |
|
|
| Settling Time(s) |
|
|
|
|
|
|
|
|
3 |
|
|
| DAC Channels |
|
|
|
|
|
|
|
|
4 |
|
|
| Power Consumption(Typ)(mW) |
|
|
|
|
|
|
|
|
3 |
|
|
| INL(Max)(+/-LSB) |
|
|
|
|
|
|
|
|
1 |
|
|
| Output Range Min.(mA/V) |
|
|
|
|
|
|
|
|
0 |
|
|
| Zero Code Error(Typ)(mV) |
|
|
|
|
|
|
|
|
12 |
|
|
| Output Range Max.(mA/V) |
|
|
|
|
|
|
|
|
5.1 |
|
|
| DAC Architecture |
|
|
|
|
|
|
|
|
String |
|
|
| Gain Error(Max)(%FSR) |
|
|
|
|
|
|
|
|
0.6 |
|
|
| Reference |
|
|
|
|
|
|
|
|
Type |
|
|
| Sample / Update Rate(MSPS) |
|
|
|
|
|
|
|
|
0.102 |
|
|
| 3rd Harmonic(dBc) |
|
|
|
|
|
|
|
|
|
89 |
|
| @ MHz |
|
|
|
|
|
|
|
|
|
1 |
|
| Acl, min spec gain(V/V) |
|
|
|
|
|
|
|
|
|
2 |
|
| Estimated Package Size (WxL)(mm2) |
|
|
|
|
|
|
|
|
|
[pf]24VQFN[/pf] |
|
| 2nd Harmonic(dBc) |
|
|
|
|
|
|
|
|
|
100 |
|
| Iib(Max)(nA) |
|
|
|
|
|
|
|
|
|
3000 |
|
| Vn at Flatband(Typ)(nV/rtHz) |
|
|
|
|
|
|
|
|
|
2.5 |
|
| Io(Typ)(mA) |
|
|
|
|
|
|
|
|
|
416 |
|
