EVALUATION KIT, DOWNCONVERTING MIXER;

EVALUATION KIT, RECEIVER;

EVALUATION KIT, RECEIVER;

EVALUATION KIT, TEMPERATURE SENSOR;

EVAL KIT, CURRENT FEEDBACK AMPLIFIER;

EVALUATION KIT, RF PREDISTORTER;

EVALUATION KIT, 8-BIT D/A CONVERTER;

The ADF7030-1 is a fully integrated, radio transceiver achieving high performance at very low power. The ADF7030-1 is ideally suited for applications that require long range, network robustness, and long battery life. It is suitable for applications that operate in the ISM, SRD, and licensed frequency bands at 169.4 MHz to 169.6 MHz, 426 MHz to 470 MHz, and 863 MHz to 960 MHz. It provides extensive support for standards-based protocols like IEEE802.15.4g while also providing flexibility to support a wide range of proprietary protocols.The highly configurable low intermediate frequency (IF) receiver supports a large range of receiver channel bandwidths from 2.6 kHz to 406 kHz. This range of receiver channel bandwidths allows the ADF7030-1 to support ultranarrow-band, narrow-band, and wideband channel spacing.The ADF7030-1 features two independent PAs supporting output power ranges of −20 dBm to +13 dBm and −20 dBm to +17 dBm. The PAs support ultrafine adjustment of the power with a step resolution of 0.1 dB. The PA output power is exceptionally robust over temperature and voltage. The PAs have an automatic power ramp control to limit spectral splatter to meet regulatory standards.The ADF7030-1 features an on-chip ARM® Cortex®-M0 processor that performs radio control, radio calibration, and packet management. Cortex-M0 eases the processing burden of the host processor because the ADF7030-1 integrates the lower layers of a typical communication protocol stack. This internal processor also permits the download and execution of Analog Devices, Inc., provided firmware modules that can extend the functionality of the ADF7030-1.The ADF7030-1 has two packet modes: generic packet mode and IEEE802.15.4g mode. In generic packet mode, the packet format is highly flexible and fully programmable, thereby ensuring its compatibility with proprietary packet formats. In IEEE802.15.4g packet mode, the packet format conforms to the IEEE802.15.4g standard. FEC, as per the IEEE802.15.4g standard, is also supported.The ADF7030-1 operates with a power supply range of 2.2 V to 3.6 V and has very low power consumption in both Tx and Rx modes, enabling long lifetimes in battery-operated systems. An ultralow power deep sleep mode achieves a typical current of 10 nA with the configuration memory retained.A complete wireless solution can be built using a small number of external discrete components and a host processor (typically a microcontroller). The host processor can configure the ADF7030-1 using a simple command-based protocol over a standard 4-wire SPI interface. A single-byte command transitions the radio between states or performs a radio function.The ADF7030-1 is available in two package types: a 6 mm × 6 mm, 40-lead LFCSP and a 7 mm × 7 mm, 48-lead LQFP. Both package types use NiPdAu plating to mitigate against silver migration in high humidity applications. The ADF7030-1 operating temperature range is −40°C to +85°C.For Figure 13 to Figure 19, Figure 30, Figure 42, Figure 60, Figure 61, and Figure 75 in the Typical Performance Characteristics section, PA_COARSE is a programmable value that provides a coarse adjustment of the PA output power. This value can be programmed in the range of 1 to 6 for PA1, and from 1 to 10 for PA2. PA_FINE is a programmable value that provides a fine adjustment of the PA output power. This value can be programmed in the range of 3 to 127 for both PA1 and PA2. PA_MICRO is a programmable value that provides a microadjustment (typically <0.1 dB) of the PA output power. This value can be programmed in the range of 1 to 31 for both PA1 and PA2. PAOLDO_VOUT_CON is a programmable value that configures the internal LDO voltage that provides bias for the PA. For additional information on these bit settings, see the ADF7030-1 Software Reference Manual, which is the detailed programming guide for the device.Applications IEEE 802.15.4g (MR-FSK PHY)  Wireless M-Bus (EN 13757-4) Smart metering Security and building automation  Active tag asset tracking Industrial control Wireless sensor networks (WSNs)

The MAX1471 low-power, CMOS, superheterodyne, RF dual-channel receiver is designed to receive both amplitude-shift-keyed (ASK) and frequency-shift-keyed (FSK) data without reconfiguring the device or introducing any time delay normally associated with changing modulation schemes. The MAX1471 requires few external components to realize a complete wireless RF digital data receiver for the 300MHz to 450MHz ISM bands.The MAX1471 includes all the active components required in a superheterodyne receiver including: a low-noise amplifier (LNA), an image-reject (IR) mixer, a fully integrated phase-locked loop (PLL), local oscillator (LO), 10.7MHz IF limiting amplifier with received-signal-strength indicator (RSSI), low-noise FM demodulator, and a 3V voltage regulator. Differential peak-detecting data demodulators are included for both the FSK and ASK analog baseband data recovery. The MAX1471includes a discontinuous receive (DRX) mode for low-power operation, which is configured through a serial interface bus.The MAX1471 is available in a 32-pin thin QFN package and is specified over the automotive -40°C to +125°C temperature range.ApplicationsAutomotive Remote Keyless Entry (RKE)Garage Door OpenersHome AutomationLocal Telemetry SystemsMedical SystemsSecurity SystemsTire-Pressure Monitoring SystemsWireless KeysWireless Sensors

The ADP124 / ADP125 are low quiescent current, low dropout linear regulators. They are designed to operate from an input voltage between 2.3 V and 5.5 V and to provide up to 500 mA of output current. The low 130 mV dropout voltage at a 500 mA load improves efficiency and allows operation over a wide input voltage range.The low 210 μA of quiescent current with a 500 mA load makes the ADP124 / ADP125 ideal for battery-operated portable equipment.The ADP124 is capable of 31 fixed-output voltages from 1.75 V to 3.3 V. The ADP125 is the adjustable version of the device and allows the output voltage to be set between 0.8 V and 5.0 V by an external voltage divider.The ADP124/ADP125 are specifically designed for stable operation with tiny 1 μF ceramic input and output capacitors to meet the requirements of high performance, space constrained applications.The ADP124 / ADP125 have an internal soft start that gives a constant start-up time of 350 μs. Short-circuit protection and thermal overload protection circuits prevent damage in adverse conditions. The ADP124 / ADP125 are available in an 8-lead exposed paddle MSOP package. When compared with the standard MSOP package, the exposed paddle MSOP package has lower thermal resistance (θJA). The lower thermal resistance package allows the ADP124 / ADP125 to meet the needs of a variety of portable applications while minimizing the rise in junction temperature.APPLICATIONS Digital camera and audio devices Portable and battery-powered equipment Automatic meter reading (AMR) meters GPS and location management units Medical instrumentation Point of load power