|
|
Texas Instruments
TLV4112IP
|
Texas Instruments
LM118H/883
|
Texas Instruments
INA1650IPWR
|
California Eastern Laboratories (CEL)
PS9551AL4-V-E3-AX
|
Fairchild Semiconductors
2N5172
|
NXP Semiconductors N.V.
BGA2771,115
|
Maxim Integrated
ICL7642BCWE+
|
Texas Instruments
INA114AP
|
Texas Instruments
INA115AU
|
onsemi
MPS8098
|
Price |
|
|
|
$2.28 |
|
|
|
|
$7.39 |
|
|
RoHS |
|
Yes |
No |
Compliant |
Compliant |
|
Compliant |
Yes |
Yes |
Yes |
Not Compliant |
Lead Status |
|
Yes |
No |
No |
No |
|
No |
Yes |
Yes |
Yes |
No |
Input Bias Current(Max)(pA) |
|
25 |
|
|
|
|
|
|
|
|
|
Iq per channel(Max)(mA) |
|
1 |
|
|
|
|
|
|
|
|
|
Rating |
|
Catalog |
|
|
|
|
|
|
Catalog |
Catalog |
|
Output Current(Typ)(mA) |
|
320 |
|
|
|
|
|
|
|
|
|
CMRR(Typ)(dB) |
|
68 |
|
|
|
|
|
|
|
|
|
Total Supply Voltage(Min)(+5V=5, +/-5V=10) |
|
2.5 |
|
|
|
|
|
|
|
|
|
Slew Rate(Typ)(V/us) |
|
1.57 |
|
10 |
|
|
|
|
|
|
|
CMRR(Min)(dB) |
|
68 |
|
|
|
|
|
|
110 |
110 |
|
Package Size |
|
mm2 |
|
|
|
|
|
|
mm2 |
mm2 |
|
Architecture |
|
CMOS |
|
|
|
|
|
|
|
|
|
Number of Channels(#) |
|
2 |
|
2 |
|
|
|
|
1 |
1 |
|
Approx. Price (US$) |
|
0.90 | 1ku |
|
1.65 | 1ku |
|
|
|
|
4.80 | 1ku |
4.20 | 1ku |
|
GBW(Typ)(MHz) |
|
2.7 |
|
|
|
|
|
|
|
|
|
Vos (Offset Voltage @ 25C)(Max)(mV) |
|
3.5 |
|
|
|
|
|
|
|
|
|
Offset Drift(Typ)(uV/C) |
|
3 |
|
|
|
|
|
|
|
|
|
Package Group |
|
MSOP-PowerPAD,PDIP,SOIC |
|
TSSOP |
|
|
|
|
PDIP,SOIC |
SOIC |
|
Additional Features |
|
N/A |
|
|
|
|
|
|
|
|
|
Iq per channel(Typ)(mA) |
|
0.7 |
|
5.25 |
|
|
|
|
|
|
|
Operating Temperature Range(C) |
|
-40 to 125,0 to 70 |
|
-40 to 125 |
|
|
|
|
-40 to 85 |
-40 to 85 |
|
Total Supply Voltage(Max)(+5V=5, +/-5V=10) |
|
6 |
|
|
|
|
|
|
|
|
|
Rail-to-Rail |
|
In to V-,Out |
|
|
|
|
|
|
|
|
|
Noise Floor (RTO, 20kHz BW)(dBu) |
|
|
|
-104.7 |
|
|
|
|
|
|
|
Supply(Min)(V) |
|
|
|
4.5 |
|
|
|
|
|
|
|
Common Mode Input Impedance(k) |
|
|
|
250 |
|
|
|
|
|
|
|
Gain(V/V) |
|
|
|
1 |
|
|
|
|
1 to 10000 |
1 to 10000 |
|
Differential Input Impedance(k) |
|
|
|
1000 |
|
|
|
|
|
|
|
THD + N @ 1 kHz(%) |
|
|
|
0.00039 |
|
|
|
|
|
|
|
Supply(Max)(V) |
|
|
|
36 |
|
|
|
|
|
|
|
CMRR Rs=0(Min)(dB) |
|
|
|
85 |
|
|
|
|
|
|
|
Noise at 0.1 Hz - 10 Hz(Typ)(uVpp) |
|
|
|
|
|
|
|
|
0.4 |
0.4 |
|
Vs(Max)(V) |
|
|
|
|
|
|
|
|
36 |
36 |
|
Bandwidth at Min Gain(Typ)(MHz) |
|
|
|
|
|
|
|
|
1 |
1 |
|
Gain Error (+/-)(Max)(%) |
|
|
|
|
|
|
|
|
2 |
2 |
|
Gain Non-Linearity (+/-)(Max)(%) |
|
|
|
|
|
|
|
|
0.002 |
0.002 |
|
Gain(Max)(V/V) |
|
|
|
|
|
|
|
|
10000 |
10000 |
|
Input Offset Drift (+/-)(Max)(uV/Degrees Celsius) |
|
|
|
|
|
|
|
|
0.25 |
0.25 |
|
Input Offset (+/-)(Max)(uV) |
|
|
|
|
|
|
|
|
50 |
50 |
|
Noise at 1kHz(Typ)(nV/rt(Hz)) |
|
|
|
|
|
|
|
|
11 |
11 |
|
Gain(Min)(V/V) |
|
|
|
|
|
|
|
|
1 |
1 |
|
Iq(Typ)(mA) |
|
|
|
|
|
|
|
|
2.2 |
2.2 |
|
Bandwidth at Min Gain(Min)(MHz) |
|
|
|
|
|
|
|
|
10 |
10 |
|
Vs(Min)(V) |
|
|
|
|
|
|
|
|
4.5 |
4.5 |
|
Input Bias Current (+/-)(Max)(nA) |
|
|
|
|
|
|
|
|
2 |
2 |
|