|
|
Texas Instruments
TPA3255DDV
|
Fairchild Semiconductors
2N5087
|
Texas Instruments
TLV4112CDGN
|
Texas Instruments
TLV4112IP
|
onsemi
MPS8098
|
Texas Instruments
INA1650IPWR
|
Maxim Integrated
ICL7642BCWE+
|
NXP Semiconductors N.V.
BGA2771,115
|
Fairchild Semiconductors
J201
|
Fairchild Semiconductors
MPS6515
|
| Price |
|
|
|
$1.76 |
|
|
$2.28 |
|
|
|
|
| RoHS |
|
Compliant |
|
Yes |
Yes |
Not Compliant |
Compliant |
Yes |
Compliant |
Compliant |
|
| Lead Status |
|
No |
|
Yes |
Yes |
No |
No |
Yes |
No |
No |
|
| Operating Temperature Range(C) |
|
0 to 70 |
|
-40 to 125,0 to 70 |
-40 to 125,0 to 70 |
|
-40 to 125 |
|
|
|
|
| Iq(Max)(mA) |
|
11.5 |
|
|
|
|
|
|
|
|
|
| Package Group |
|
HTSSOP |
|
MSOP-PowerPAD,PDIP,SOIC |
MSOP-PowerPAD,PDIP,SOIC |
|
TSSOP |
|
|
|
|
| Rating |
|
Catalog |
|
Catalog |
Catalog |
|
|
|
|
|
|
| Power to Bridge Tied Load(Max)(W) |
|
325 |
|
|
|
|
|
|
|
|
|
| Control Interface |
|
Hardware |
|
|
|
|
|
|
|
|
|
| Analog Supply (V)(Min) |
|
10.8 |
|
|
|
|
|
|
|
|
|
| Package Size |
|
mm2 |
|
mm2 |
mm2 |
|
|
|
|
|
|
| Approx. Price (US$) |
|
5.55 | 1ku |
|
0.90 | 1ku |
0.90 | 1ku |
|
1.65 | 1ku |
|
|
|
|
| Power to Parallel Bridge Tied Load(Max)(W) |
|
600 |
|
|
|
|
|
|
|
|
|
| Supported Bridge Tied Load(Min)(Ohms) |
|
4 |
|
|
|
|
|
|
|
|
|
| Speaker Channels(Max) |
|
4 |
|
|
|
|
|
|
|
|
|
| Supported Parallel Bridge Tied Load(Min)(Ohms) |
|
2 |
|
|
|
|
|
|
|
|
|
| Analog Supply (V)(Max) |
|
13.2 |
|
|
|
|
|
|
|
|
|
| Audio Input Type |
|
Analog |
|
|
|
|
|
|
|
|
|
| Power Stage Supply(Max)(V) |
|
53.5 |
|
|
|
|
|
|
|
|
|
| Closed/Open Loop |
|
Closed |
|
|
|
|
|
|
|
|
|
| Power Stage Supply(Min)(V) |
|
12 |
|
|
|
|
|
|
|
|
|
| Output Power(W) |
|
325 |
|
|
|
|
|
|
|
|
|
| Input Bias Current(Max)(pA) |
|
|
|
25 |
25 |
|
|
|
|
|
|
| Iq per channel(Max)(mA) |
|
|
|
1 |
1 |
|
|
|
|
|
|
| Output Current(Typ)(mA) |
|
|
|
320 |
320 |
|
|
|
|
|
|
| CMRR(Typ)(dB) |
|
|
|
68 |
68 |
|
|
|
|
|
|
| Total Supply Voltage(Min)(+5V=5, +/-5V=10) |
|
|
|
2.5 |
2.5 |
|
|
|
|
|
|
| Slew Rate(Typ)(V/us) |
|
|
|
1.57 |
1.57 |
|
10 |
|
|
|
|
| CMRR(Min)(dB) |
|
|
|
68 |
68 |
|
|
|
|
|
|
| Architecture |
|
|
|
CMOS |
CMOS |
|
|
|
|
|
|
| Number of Channels(#) |
|
|
|
2 |
2 |
|
2 |
|
|
|
|
| GBW(Typ)(MHz) |
|
|
|
2.7 |
2.7 |
|
|
|
|
|
|
| Vos (Offset Voltage @ 25C)(Max)(mV) |
|
|
|
3.5 |
3.5 |
|
|
|
|
|
|
| Offset Drift(Typ)(uV/C) |
|
|
|
3 |
3 |
|
|
|
|
|
|
| Additional Features |
|
|
|
N/A |
N/A |
|
|
|
|
|
|
| Iq per channel(Typ)(mA) |
|
|
|
0.7 |
0.7 |
|
5.25 |
|
|
|
|
| Total Supply Voltage(Max)(+5V=5, +/-5V=10) |
|
|
|
6 |
6 |
|
|
|
|
|
|
| Rail-to-Rail |
|
|
|
In to V-,Out |
In to V-,Out |
|
|
|
|
|
|
| Noise Floor (RTO, 20kHz BW)(dBu) |
|
|
|
|
|
|
-104.7 |
|
|
|
|
| Supply(Min)(V) |
|
|
|
|
|
|
4.5 |
|
|
|
|
| Common Mode Input Impedance(k) |
|
|
|
|
|
|
250 |
|
|
|
|
| Gain(V/V) |
|
|
|
|
|
|
1 |
|
|
|
|
| Differential Input Impedance(k) |
|
|
|
|
|
|
1000 |
|
|
|
|
| THD + N @ 1 kHz(%) |
|
|
|
|
|
|
0.00039 |
|
|
|
|
| Supply(Max)(V) |
|
|
|
|
|
|
36 |
|
|
|
|
| CMRR Rs=0(Min)(dB) |
|
|
|
|
|
|
85 |
|
|
|
|
