|
|
Texas Instruments
CDC960DL
|
Texas Instruments
TRF3761-FIRHARG4
|
Texas Instruments
CDCM9102RHBT
|
Texas Instruments
CDC208NSR
|
Texas Instruments
CDCVF25081PWR
|
Texas Instruments
CDCEL949PW
|
Texas Instruments
CDC328ADBR
|
Texas Instruments
CDC2586PAHR
|
Texas Instruments
BQ4802LYPW
|
Texas Instruments
NE555DRG4
|
| Price |
|
|
|
$4.16 |
|
|
$4.73 |
|
|
$4.98 |
$0.21 |
| RoHS |
|
Yes |
Compliant |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Compliant |
| Lead Status |
|
Yes |
|
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
No |
| Package Size |
|
mm2=WxL |
|
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
|
mm2 |
mm2 |
| VCC Core(V) |
|
3.3 |
|
3.3 |
|
|
1.8 |
|
|
|
|
| Special Features |
|
PC Synthesizer,Spread Spectrum Clocking (SSC),3.3V Vcc/Vdd |
|
|
|
|
Integrated EEPROM,Multiplier/Divider,Spread Spectrum Clocking (SSC) |
|
|
External SRAM Control,Integrated CPU Supv |
|
| Operating Temperature Range(C) |
|
0 to 70 |
|
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
-40 to 85 |
|
0 to 70 |
0 to 70 |
| Package Group |
|
SSOP |
|
VQFN |
SO,SOIC |
SOIC,TSSOP |
TSSOP |
SOIC,SSOP |
TQFP |
SOIC,TSSOP |
PDIP,SO,SOIC,TSSOP |
| Programmability |
|
SMBus |
|
Pin configuration |
|
|
EEPROM |
|
|
|
|
| No. of Outputs |
|
17 |
|
2 |
8 |
8 |
9 |
6 |
12 |
|
|
| Input Level |
|
Crystal |
|
LVPECL, LVDS, LVCMOS |
TTL |
|
Crystal, LVCMOS |
TTL |
|
|
|
| VCC Out(V) |
|
3.3 |
|
3.3 |
5 |
|
1.8 |
5 |
|
|
|
| Output Frequency(Max)(MHz) |
|
200 |
|
1296 |
60 |
|
230 |
100 |
|
|
|
| Approx. Price (US$) |
|
2.18 | 1ku |
|
2.25 | 1ku |
5.90 | 1ku |
1.45 | 1ku |
2.35 | 1ku |
5.14 | 1ku |
8.40 | 1ku |
2.50 | 1ku |
0.07 | 1ku |
| Output Frequency(Min)(MHz) |
|
14.3 |
|
|
|
|
|
|
|
|
|
| Output Level |
|
LVCMOS |
|
LVDS, LVPECL, RF |
CMOS |
|
LVCMOS |
TTL |
|
|
|
| Rating |
|
|
|
|
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
| Input Frequency(Max)(MHz) |
|
|
|
|
60 |
|
|
100 |
|
|
|
| tsk(o)(ps) |
|
|
|
|
|
150 |
|
|
500 |
|
|
| t(phase error)(ps) |
|
|
|
|
|
200 |
|
|
500 |
|
|
| Absolute Jitter (Peak-to-Peak Cycle or Period Jitter)(ps) |
|
|
|
|
|
100 |
|
|
200 |
|
|
| Operating Frequency Range(Max)(MHz) |
|
|
|
|
|
200 |
|
|
100 |
|
|
| Operating Frequency Range(Min)(MHz) |
|
|
|
|
|
10 |
|
|
|
|
|
| VCC(V) |
|
|
|
|
|
3.3 |
1.8 |
|
3.3 |
|
|
| Divider Ratio |
|
|
|
|
|
|
Universal |
|
|
|
|
| Function |
|
|
|
|
|
|
Clock Synthesizer |
|
|
|
|
| Output Skew(ps) |
|
|
|
|
|
|
150 |
|
|
|
|
| Jitter-Peak to Peak(P-P) or Cycle to Cycle(C-C) |
|
|
|
|
|
|
60 ps |
|
|
|
|
| Package Size(mm2=WxL) |
|
|
|
|
|
|
|
|
[pf]52TQFP[/pf] |
|
|
| Output Drive(mA) |
|
|
|
|
|
|
|
|
12 |
|
|
| RTC Bytes |
|
|
|
|
|
|
|
|
|
16 |
|
| Bus Interface |
|
|
|
|
|
|
|
|
|
Parallel |
|
| Iq(Typ)(uA) |
|
|
|
|
|
|
|
|
|
|
2000 |
| Frequency(Max)(MHz) |
|
|
|
|
|
|
|
|
|
|
0.1 |
| VCC(Max)(V) |
|
|
|
|
|
|
|
|
|
|
16 |
| VCC(Min)(V) |
|
|
|
|
|
|
|
|
|
|
4.5 |
