The ADF4401A is a fully integrated, system in package (SiP) translation loop (also known as an offset loop) module that includes a voltage controlled oscillator (VCO) and calibration phase-locked loop (PLL) circuit. Designed for highly jitter sensitive applications, this solution reduces board space and complexity compared to traditional discrete translation loop solutions designed on a printed circuit board (PCB). The time to market is significantly reduced by taking advantage of this highly integrated solution with in package circuitry and enhanced isolation that attenuates spurious components. The ADF4401A provides a frequency synthesis solution for engineers designing highly competitive systems. The ADF4401A requires an external phase detector or phase frequency detector (PFD) and an external local oscillator (LO) to form a frequency synthesis solution. The ADF4401A implements an integrated downconversion mixing stage in the feedback loop that sets the loop gain to 1 and minimizes the in band phase noise. By combining the frequency downconversion stage and low noise, integrated, wideband, VCO technology from Analog Devices, Inc., the ADF4401A offers a wideband jitter performance of 9 fs rms at 8 GHz output. The output jitter performance is largely dependent on the performance of the external offset LO. The ADF4401A module uses an internal PFD and VCO calibration circuitry to select the appropriate VCO band. The user can disable the calibration circuitry and close the loop using the external PFD. All on-chip registers are controlled via a serial port interface (SPI). APPLICATIONSInstrumentation and measurement Automated test equipment Aerospace and defense

The HMC833LP6GE is a low noise, wide band, Fractional-N Phase-Locked-Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO) with a fundamental frequency of 1500 MHz - 3000 MHz, and an integrated VCO Output Divider (divide by 1/2/4/6.../60/62) and doubler, that together allow the HMC833LP6GE to generate frequencies from 25 MHz to 6000 MHz. The integrated Phase Detector (PD) and delta-sigma modulator, capable of operating at up to 100 MHz, permit wider loop-bandwidths with excellent spectral performance.The HMC833LP6GE features industry leading phase noise and spurious performance, across all frequencies, that enable it to minimize blocker effects, and improve receiver sensitivity and transmitter spectral purity. The superior noise floor (< -170 dBc/Hz) makes the HMC833LP6GE an ideal source for a variety of applications - such as; LO for RF mixers, a clock source for high-frequency data-converters, or a tunable reference source for ultra-low spurious applications.Additional features of the HMC833LP6GE include RF output power control from 0 to 9 dB (3 dB steps), output Mute function, and a delta-sigma modulator Exact Frequency Mode which enables users to generate output frequencies with 0 Hz frequency error.Applications Cellular Infrastructure Microwave Radio WiMax, WiFi Communications Test Equipment CATV Equipment DDS Replacement Military Tunable Reference Source for?Spurious- Free Performance

The HMC911 is a broadband time delay with 62 ps to 75 pscontinuously adjustable delay range to 24 GHz. The delay controlis linearly monotonic with respect to the differential delay controlvoltage (VDCP and VDCN), and the control input has a modulationbandwidth of 1.6 Hz. The HMC911 provides a differentialoutput voltage with constant amplitude for single-ended ordifferential input voltages above the input sensitivity level, andthe output voltage swing can be adjusted using the VAC control pin.The HMC911 features internal temperature compensation andbias circuitry to minimize delay variations with temperature. AllRF inputs and outputs of the HMC911 are internally terminatedwith 50 ? to VCC and can be ac-coupled or dc-coupled. Outputpins connect directly to a 50 ? to VCC terminated system.However, use dc blocking capacitors if the terminated systeminput is 50 ? to a dc voltage other than VCC.The HMC911 is available in a RoHS-compliant, 24-terminal,ceramic, leadless chip carrier. Applications Synchronization of clock and data Transponder design Serial data transmissions up to 32 Gbps Broadband test and measurement RF ATE applications

The HMC7043 is designed to meet the requirements of multicarrier GSM and LTE base station designs, and offers a wide range of clock management and distribution features to simplify baseband and radio card clock tree designs.The HMC7043 provides 14 low noise and configurable outputs to offer flexibility in interfacing with many different components in a base transceiver station (BTS) system, such as data converters, local oscillators, transmit/receive modules, field programmable gate arrays (FPGAs), and digital front-end ASICs. The HMC7043 can generate up to seven DCLK and SYSREF clock pairs per the JESD204B/JESD204C interface requirements.The system designer can generate a lower number of DCLK and SYSREF pairs, and configure the remaining output signal paths for independent phase and frequency. Both the DCLK and SYSREF clock outputs can be configured to support different signaling standards, including CML, LVDS, LVPECL, and LVCMOS, and different bias conditions to adjust for varying board insertion losses. One of the unique features of the HMC7043 is the independent flexible phase management of each of the 14 channels. All 14 channels feature both frequency and phase adjustment. The outputs can also be programmed for 50 ? or 100 ? internal and external termination options. The HMC7043 device features an RF SYNC feature that synchronizes multiple HMC7043 devices deterministically, that is, ensures that all clock outputs start with the same edge. This operation is achieved by rephrasing the nested HMC7043 or SYSREF control unit/divider, deterministically, and then restarting the output dividers with this new phase. The HMC7043 is offered in a 48-lead, 7 mm ? 7 mm LFCSP package with an exposed pad connected to ground. Applications JESD204B/JESD204C clock generation Cellular infrastructure (multicarrier GSM, LTE, W-CDMA) Data converter clocking Phase array reference distribution Microwave baseband cards

The HMC1033LP6GE is a low-noise, wide-band 3.3 V clock generator IC with a fractional-N Phase Locked Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO). The device provides differential clock outputs between 25 MHz and 550 MHz range. The HMC1033LP6GE features a low noise Phase Detector (PD) and Delta- Sigma modulator, capable of operating at up to 100 MHz which permits wider loop-bandwidths and excellent spurious performance.The HMC1033LP6GE features industry leading phase noise and jitter performance, across the operating range, that enable it to improve link level jitter performance, Bit-Error-Rates (BER) and eye diagram metrics. The superior noise floor (<-162 dBc/Hz) makes the HMC1033LP6GE an ideal source for a variety of applications?such as clock references for high speed data converters, physical layer devices (PHY), serializer/deserializer (SER DES) circuits, FPGAs and processors. The HMC1033LP6GE can also be used as an LO for 10G/40G/100G optical modules and transponders, as well as primary reference clock for 10G/40G/100G line cards, and for jitter attenuation and frequency translation.The differential output of the HMC1033LP6GE can be set to either an LVPECL or LVDS compatible mode, with further output swing which makes the device flexible and compatible with a wide variety of signal level requirements. The output can be internally terminated to reduce component count and cost. The outputs could be terminated externally in LVPECL mode using standard methods such as resistors to ground. An Output Mute function allows the user to shut off the outputs, such as may be required for board testing or debugging. The LVPECL/LVDS, amplitude select and Output Mute function are all programmed SPI serial programming.The HMC1033LP6GE is designed to select between a Power Priority or a Performance Priority mode. The Power Priority setting reduces the current consumption of the part, whereas the Performance Priority setting improves the Jitter and Phase Noise performance.The 24 bit Delta-Sigma Modulator further enhances Hittite?s Exact Frequency Mode, which enables users to generate output frequencies with 0 Hz frequency error in many applications.APPLICATIONS 10G/40G/100G Optical Modules,?Transponders, Line Cards OTN and SONET /SDH Applications Data Converters,?Sample Clock Generation Cellular/4G Infrastructure High Frequency Processor/FPGA Clocks Any Frequency Clock Rate Generation Low Jitter SAW Oscillator Replacement DDS Replacement Frequency Translation Frequency Margining

The HMC385LP4(E) is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO with integrated resonator, negative resistance device, varactor diode, and buffer amplifier. Covering 2.25 to 2.5 GHz, the VCO?s phase noise performance is excellent over temperature, shock, vibration and process due to the oscillator?s monolithic structure. Power output is 4.5 dBm typical from a single supply of 3V @ 35mA. The voltage controlled oscillator is packaged in a low cost leadless QFN 4x4 mm surface mount package.APPLICATIONS Wireless Infrastructure Industrial Controls Test Equipment Military

The HMC386LP4(E) is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO with integrated resonator, negative resistance device, varactor diode, and buffer amplifiers. Covering 2.6 to 2.8 GHz, the VCO?s phase noise performance is excellent over temperature, shock, vibration and process due to the oscillator?s monolithic structure. Power output is 5 dBm typical from a single supply of 3V @ 35mA. The voltage controlled oscillator is packaged in a low cost leadless QFN 4x4 mm surface mount package.APPLICATIONS Wireless Infrastructure Industrial Controls Test Equipment Military

The HMC440QS16G(E) is an integer-n synthesizer that incorporates a 10 to 1300 MHz digital Phase-Frequency Detector with 10 to 2800 MHz 5-Bit frequency counter (continuous division from 2 to 32) in miniature 16 lead QSOP plastic packages. It is intended for use in low phase noise offset-synthesizer app-lications.The HMC440QS16G(E) combines high frequency operation along with ultra low phase noise floor making possible synthesizers with wide loop bandwidth and low N resulting in fast settling and very low phase noise. When used in conjunction with a differential loop amplifier, the HMC440QS16G(E) generates an output voltage that can be used to phase lock a VCO to a reference oscillator.Applications Satellite Communication Systems? Point-to-Point Radios? Military Applications? Sonet Clock Generation Test Equipment

The ADF4007 is a high frequency divider/PLL synthesizer that can be used in a variety of communications applications. It can operate to 7.5 GHz on the RF side and to 120 MHz at the PFD. It consists of a low noise digital PFD (phase frequency detec-tor), a precision charge pump, and a divider/prescaler. The divider/prescaler value can be set by two external control pins to one of four values (8, 16, 32, or 64). The reference divider is permanently set to 2, allowing an external REFIN frequency of up to 240 MHz.A complete PLL (phase-locked loop) can be implemented if the synthesizer is used with an external loop filter and a VCO (voltage controlled oscillator). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.Applications Satellite communications Broadband wireless access CATV Instrumentation Wireless LANs

The ADF4252 is a dual fractional-N/integer-N frequencysynthesizer that can be used to implement local oscillators (LO)in the upconversion and downconversion sections of wirelessreceivers and transmitters. Both the RF and IF synthesizersconsist of a low noise digital phase frequency detector (PFD), aprecision charge pump, and a programmable reference divider.The RF synthesizer has a ?-?-based fractional interpolator thatallows programmable fractional-N division. The IF synthesizerhas programmable integer-N counters. A complete phase-lockedloop (PLL) can be implemented if the synthesizer is used withan external loop filter and voltage controlled oscillator (VCO).Control of all the on-chip registers is via a simple 3-wire interface.The device operates with a power supply ranging from 2.7 V to3.3 V and can be powered down when not in use.Applications Base stations for mobile radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications test equipment CATV equipment