The HMC769LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) Frequency Synthesizer with an integrated Voltage Controlled Oscillator (VCO). The input reference frequency range is DC to 350 MHz while the advanced delta-sigma modulator design in the fractional synthesizer allows both ultra-fine step sizes and very low spurious products. The highly integrated structure provides excellent phase noise performance over temperature, shock and process. In addition, the HMC769LP6CE offers frequency sweep and modulation features, external triggering, double-buffering, exact frequency control, phase modulation and more. The HMC769LP6CE is packaged in a leadless QFN 6 x 6 mm surface mount package.For theory of operation and register map refer to the 'PLLs w/ Integrated VCO - Microwave VCOs' Operating Guide.Applications VSAT Radio Microwave Point-To-Point Radios Test Equipment & Industrial Control Military End-Use Phased Array Applications FMCW Radar Systems

The HMC832LP6GE is a 3.3 V, high performance, wide-band, Fractional-N Phase-Locked-Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO) with a fundamental frequency of 1500 MHz - 3000 MHz, and an integrated VCO Output Divider (divide by 1/2/4/6.../60/62), that enables the HMC832LP6GE to generate continuous frequencies from 25 MHz to 3000 MHz. The integrated Phase Detector (PD) and delta-sigma modulator, capable of operating at up to 100 MHz, permit wider loop-bandwidths and faster frequency tuning, with excellent spectral performance.Industry leading phase noise and spurious performance, across all frequencies, enable the HMC832LP6GE to minimize blocker effects, improve receiver sensitivity and transmitter spectral purity. Low noise floor (-160 dBc/Hz) eliminates any contribution to modulator/mixer noise floor in transmitter applications.The HMC832LP6GE features all 3.3 V supply and an innovative Programmable Performance technology that enables the HMC832LP6GE to tailor current consumption and corresponding noise floor performance to each individual application by selecting either a low current consumption mode, or a high performance mode for an improved noise floor performance.Additional features of the HMC832LP6GE include 12 dB of RF output gain control in 1 dB steps; Output Mute function to automatically mute the output during frequency changes when the device is not locked; Selectable resistance for better output return loss; Programmable differential or single-ended outputs, with the ability to select either output in single-ended mode; and a delta-sigma modulator Exact Frequency Mode which enables users to generate output frequencies with 0 Hz frequency error.Applications Cellular Infrastructure Microwave Radio WiMax, WiFi Communications Test Equipment CATV Equipment DDS Replacement Military Tunable Reference Source for?Spurious- Free Performance

The HMC834LP6GE is a low noise, wide band, Fractional-N Phase-Locked-Loop (PLL) that features an integrated Voltage Controlled Oscillator (VCO) with a fundamental frequency of 2800 MHz - 4200 MHz, and an integrated VCO Output Divider (divide by 1/2/4/6.../60/62) and doubler, that together allow the HMC834LP6GE to generate frequencies from 45 MHz to 1050 MHz, from 1400 MHz to 2100 MHz, from 2800 MHz to 4200 MHz, and from 5600 MHz to 8400 MHz. The integrated Phase Detector (PD) and delta-sigma modulator, capable of operating at up to 100 MHz, permit wider loop-bandwidths with excellent spectral performance.The HMC834LP6GE features industry leading phase noise and spurious performance, across all frequencies, that enable it to minimize blocker effects, and improve receiver sensitivity and transmitter spectral purity. The superior noise floor (< -170 dBc/Hz) makes the HMC834LP6GE an ideal source for a variety of applications - such as; LO for RF mixers, a clock source for high-frequency data-converters, or a tunable reference source for ultra-low spurious applications.Additional features of the HMC834LP6GE include RF output power control from 0 to 6 dB (~2 dB steps), output Mute function, and a delta-sigma modulator Exact Frequency Mode which enables users to generate output frequencies with 0 Hz frequency error.Applications Cellular/4G, WiMax Infrastructure Repeaters and Femtocells Communications Test Equipment CATV Equipment Phased Array Applications DDS Replacement Very High Data Rate Radios Tunable Reference Source for?Spurious- Free Performance

The HMC987LP5E 1-to-9 fanout buffer is designed for low noise clock distribution. It is intended to generate relatively square wave outputs with rise/fall times < 100 ps. The low skew and jitter outputs of the HMC987LP5E, combined with its fast rise/fall times, leads to controllable low-noise switching of downstream circuits such as mixers, ADCs/DACs or SERDES devices. The noise floor is particularly important in these applications, when the clocknetwork bandwidth is wide enough to allow squarewave switching. Driven at 2 GHz, outputs of the HMC987LP5E have a noise floor of ?166 dBc/Hz, corresponding to a jitter density of 0.6 asec/rtHz - or 50 fs over an 8 GHz bandwidth.The input stage can be driven single-ended or differentially, in a variety of signal formats (CML, LVDS, LVPECL or CMOS), AC or DC coupled. The input stage also features adjustable input impedance. It has 8 LVPECL outputs, and 1 CML output with adjustable swing/power-level in 3 dB steps.Individual output stages may be enabled or disabled for power-savings when not required using either hardware control pins, or under control of a serial-port interface.APPLICATIONS SONET, Fibre Channel,?GigE Clock Distribution ADC/DAC Clock Distribution Low Skew and Jitter Clock?or Data Fanout Wireless/Wired Communications Level Translation High Performance Instrumentation Medical Imaging Single-Ended to Differential?Conversion

The HMC1161 is a monolithic microwave integrated circuit (MMIC), voltage controlled oscillator (VCO) that integrates a resonator, a negative resistance device, and a varactor diode, and features a half frequency output. Because of the monolithic construction of the oscillator, the output power and phase noise performance are excellent over temperature.The output power is 11 dBm typical from a 5 V supply voltage. The VCO is housed in a RoHS-compliant LFCSP and requires no external matching components.Applications Point to point and multipoint radios? Test equipment and industrial controls? Very small aperture terminals (VSATs)?

Real Time Clock

Real Time Clock

Dual DPLL, Quad Input, 10 Output, Multiservice Line Card Clock Translator and Jitter Cleaner Features:Dual DPLL synchronizes 2 kHz to 750 MHz physical layer clocks providing frequency translation with jitter cleaning of noisy referencesComplies with ITU-T G.8262 and Telcordia GR-253Supports Telcordia GR-1244, ITU-T G.812, G.813, G.823, G.824, and G.825Continuous frequency monitoring and reference validation for frequency deviation as low as 50 ppbBoth DPLLs feature a 24-bit fractional divider with 24-bit programmable modulusProgrammable digital loop filter bandwidth: 104 Hz to 1850 HzAutomatic and manual holdover and reference switchover, providing zero delay, hitless, or phase buildout operationProgrammable priority-based reference switching with manual, automatic revertive, and automatic nonrevertive modes supported5 pairs of clock output pins with each pair useable as differential LVDS/HCSL/CML or as 2 single-ended outputs (1 Hz to 500 MHz)2 differential or 4 single-ended input referencesCrosspoint mux interconnects reference inputs to PLLsSupports embedded (modulated) input/output clock signalsFast DPLL locking modesProvides internal capability to combine the low phase noise of a crystal resonator or crystal oscillator with the frequency stability and accuracy of a TCXO or OCXOExternal EEPROM support for autonomous initializationSingle 1.8 V power supply operation with internal regulationBuilt in temperature monitor/alarm and temperature compensation for enhanced zero delay performance

Clock & Timer Development Tools Network clock generator/synchronizer

Real Time Clock