14-Bit, 40Msps Ultralow Power 1.8V ADCs Features: 74dB SNR 88dB SFDR Low Power: 81mW/49mW/35mW Single 1.8V Supply CMOS, DDR CMOS or DDR LVDS Outputs Selectable Input Ranges: 1VP-P to 2VP-P 800MHz Full-Power Bandwidth S/H Optional Data Output Randomizer Optional Clock Duty Cycle Stabilizer Shutdown and Nap Modes Serial SPI Port for Configuration Pin Compatible 14-Bit and 12-Bit Versions 40-Pin (6mm × 6mm) QFN Package

Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/C Reference Features: Integrated Precision Reference 2.5V Full-Scale 10ppm/°C (LTC2636-L) 4.096V Full-Scale 10ppm/°C (LTC2636-H) Maximum INL Error: 2.5LSB (LTC2636-12) Low Noise: 0.75mVP-P 0.1Hz to 200KHz Guaranteed Monotonic Over –40°C to 125°C Temperature Range Selectable Internal or External Reference 2.7V to 5.5V Supply Range (LTC2636-L) Ultralow Crosstalk Between DACs (<2.4nV•s) Low Power: 0.9mA at 3V (LTC2636-L) Power-On-Reset to Zero-Scale/Mid-Scale Double-Buffered Data Latches Tiny 14-Lead 4mm × 3mm DFN and 16-Lead MSOP Packages

Single 12-Bit 170Msps ADCs Features: 68.5dB SNR 90dB SFDR Low Power: 347mW/333mW/306mW Total Single 1.8V Supply DDR LVDS Outputs Easy-to-Drive 1.5VP-P Input Range 1.25GHz Full Power Bandwidth S/H Optional Clock Duty Cycle Stabilizer Low Power Sleep and Nap Modes Serial SPI Port for Configuration Pin-Compatible 14-Bit Versions 40-Lead (6mm × 6mm) QFN Package

16-Bit, 1Msps, Low Power SAR ADC with Serial Interface Features: 1Msps Throughput Rate ±2LSB INL (Max) Guaranteed 16-Bit No Missing Codes Low Power: 13mW at 1Msps, 13μW at 1ksps 92dB SNR (typ) at fIN = 20kHz Guaranteed Operation to 125°C 2.5V Supply Fully Differential Input Range ±2.5V External 2.5V Reference Input No Pipeline Delay, No Cycle Latency 1.8V to 5V I/O Voltages SPI-Compatible Serial I/O with Daisy-Chain Mode Internal Conversion Clock 16-pin MSOP and 4mm × 3mm DFN Packages 

14-Bit, 80Msps Low Power Dual ADCs Features: Two-Channel Simultaneously Sampling ADC 73.1dB SNR 90dB SFDR Low Power: 189mW/149mW/113mW Total 95mW/75mW/57mW per Channel Single 1.8V Supply CMOS, DDR CMOS, or DDR LVDS Outputs Selectable Input Ranges: 1VP-P to 2VP-P 750MHz Full Power Bandwidth S/H Optional Data Output Randomizer Optional Clock Duty Cycle Stabilizer Shutdown and Nap Modes Serial SPI Port for Configuration 64-Pin (9mm × 9mm) QFN Package

+2.5V to 5.5V, 500A Quad Rail-to-Rail Voltage Output 12-Bit DAC with Parallel Interface in 28-lead TSSOP Features: Dual 12-Bit DAC in 28-Lead TSSOP Low Power: 600 µA @ 5 V, 500 µA @ 3 V Power-Down to 200 nA @ 5 V, 80 nA @ 3 V Guaranteed Monotonic by Design Power-On-Reset to Zero Volts Double-Buffered Input Logic Simultaneous Update of DAC Outputs via LDAC pin (active low) Low Power Parallel Data Interface Temperature Range: -40°C to 105°C

True Accuracy, 16-Bit 12 V/15 V, Serial Input Voltage Output D/A Converter Features: Full 16-bit performance 1 LSB max INL and DNL Output voltage range up to ±14 V On-board reference buffers, eliminating the need for a negative reference Temperature ranges of −40°C to +85°C for A/B version/−40°C to +125°C for W/Y version Controlled output during power-on Settling time of 10 µs to 0.003% Clear function to 0 V Asynchronous update of outputs (LDAC pin) Power-on reset Serial data output for daisy chaining Data readback facility

1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators Features: Dual, simultaneous sampling, 14-bit, 2-channel ADC True differential analog inputs Programmable gain stage: ×1, ×2, ×3, ×4, ×6, ×8, ×12, ×16, ×24, ×32, ×48, ×64, ×96, ×128 Throughput rate per ADC 1 MSPS for AD7264 Analog input impedance: >1 GΩ Wide input bandwidth −3 dB bandwidth: 1.7 MHz at gain = 2 4 on-chip comparators SNR: 78 dB typical at gain = 2, 71 dB typical at gain = 32 Device offset calibration System gain calibration On-chip reference: 2.5 V −40°C to +105°C operation High speed serial interface Compatible with SPI, QSPI™, MICROWIRE™, and DSP 48-lead LFCSP and LQFP packages

500 kSPS 16-BIT PulSAR A/D Converter in MSOP/QFN Features: 16-bit resolution with no missing codes Throughput: 500 kSPS INL: ±0.6 LSB typical, ±2 LSB maximum (±0.003% of FSR) SINAD: 92.5 dB @ 20 kHz THD: −110 dB @ 20 kHz Pseudo differential analog input range 0 V to VREF with VREF up to VDD No pipeline delay Single-supply 5 V operation with  1.8 V/2.5 V/3 V/5 V logic interface Serial interface SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible Daisy-chain multiple ADCs and busy indicator Power dissipation  3.75 μW @ 5 V/100 SPS  3.75 mW @ 5 V/100 kSPS Standby current: 1 nA

625 kSPS, 24-Bit, 109 dB Sigma-Delta ADC with On-Chip Buffer Features: 120 dB dynamic range at 78 kHz output data rate 109 dB dynamic range at 625 kHz output data rate 112 dB SNR at 78 kHz output data rate 106 dB SNR at 625 kHz output data rate 625 kHz maximum fully filtered output word rate Low pass FIR filter with default or user programmable coefficients Fully differential modulator input On-chip differential amplifier for signal buffering Programmable over-sampling rate (32x to 256x) Over-range alert bit Digital offset and gain correction registers Low power and power down modes