Data Conversion IC Development Tools LTC2208IUP-14 LVDS OUT, 130Msps, 14-Bit ADC 70MHz < Ain < 140MHz, (req. DC890 & LVDS_XFMR)

Analog to Digital Converters - ADC 12-BIT SINGLE CH.PARALLEL ADC I.C.

Analog to Digital Converters - ADC LTC1853 - 8-Channel, 10-Bit/12-Bit, 400ksps, Low Power, Sampling ADCs

Data Conversion IC Development Tools LTC2348-16 Demo Board Octal, 16-Bit, 200ksps Simultaneous Sampling SAR ADC (req DC590, DC2026 or DC890)

DA CONVERTOR ROHS COMPLIANT: YES

DA CONVERTOR ROHS COMPLIANT: YES

Data Conversion IC Development Tools MAX1403 Eval Kit

Audio D/A Converter ICs Stereo Audio DAC with DirectDrive Headphone Amplifier

The LTC2393-16 is a low noise, high speed 16-bit successive approximation register (SAR) ADC. Operating from a single 5V supply, the LTC2393-16 supports a large ±4.096V fully differential input range, making it ideal for high performance applications which require maximum dynamic range. The LTC2393-16 achieves ±2LSB INL max, no missing codes at 16-bits and 94.2dB SNR (typ). The LTC2393-16 includes a precision internal reference with a guaranteed 0.5% initial accuracy and a ±20ppm/°C (max) temperature coefficient. Fast 1Msps throughput with no cycle latency in both parallel and serial interface modes makes the LTC2393-16 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2393-16 dissipates only 140mW at 1Msps, while both nap and sleep power-down modes are provided to further reduce power during inactive periods.Applications Medical Imaging High Speed Data Acquisition Digital Signal Processing Industrial Process Control Instrumentation ATE

The LTC2268-12/LTC2267-12/LTC2266-12 are 2-channel, simultaneous sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 70.6dB SNR and 88dB spurious free dynamic range (SFDR). Ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±0.3LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS.The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode). The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity.The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.   Bits LTC2268-12 12 LTC2268-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multichannel Data Acquisition Nondestructive Testing