The AD5696, a member of the nanoDAC+™ family, is a low power, quad, 16-bit buffered voltage output DAC. The device includes a gain select pin giving a full-scale output of 0V to VREF (gain = 1) or 0V to 2VREF (gain = 2) The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. The device is available in a 3 mm × 3 mm LFCSP package and in a TSSOP package.The AD5696 incorporates a power-on reset circuit and a RSTSEL pin; the RSTSEL pin ensures that the DAC outputs power up to zero scale or midscale and remain at that level until a valid write takes place. The part contains a per-channel power-down feature that reduces the current consumption of the device in power-down mode to 4 µA at 3 V.The AD5696 uses a versatile 2-wire serial interface that operates at clock rates up to 400 kHz and includes a VLOGIC pin intended for 1.8 V/3 V/5 V logic.Product Hightlights High Relative Accuracy (INL): ±2 LSB maximum Excellent DC Performance: Total unadjusted error: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Two Package Options: 3 mm × 3 mm, 16-lead LFCSP and 16-lead TSSOPApplications Digital gain and offset adjustment Programmable attenuators Process control (PLC I/O cards) Industrial automation Data acquisition systems

The AD5697R, a member of the nanoDAC+™ family, is a low power,dual, 12-bit buffered voltage output digital-to-analog converter(DAC). The device includes a 2.5 V, 2 ppm/°C internal reference(enabled by default) and a gain select pin giving a full-scale outputof 2.5 V (gain = 1) or 5 V (gain = 2). The AD5697R operates froma single 2.7 V to 5.5 V supply, is guaranteed monotonic by design,and exhibits less than 0.1% FSR gain error and 1.5 mV offseterror performance. The device is available in a 3 mm × 3 mmLFCSP and a TSSOP package.The AD5697R also incorporates a power-on reset circuit and aRSTSEL pin that ensure that the DAC outputs power up to zeroscale or midscale and remain there until a valid write takesplace. It contains a per channel power-down feature that reducesthe current consumption of the device to 4 µA at 3 V while inpower-down mode.The AD5697R uses a versatile 2-wire serial interface that operatesat clock rates up to 400 kHz and includes a VLOGIC pin intendedfor 1.8 V/3 V/5 V logic.Product Highlights Precision DC Performance. TUE: ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum Low Drift 2.5 V On-Chip Reference. 2 ppm/°C typical temperature coefficient 5 ppm/°C maximum temperature coefficient Two Package Options. 3 mm × 3 mm, 16-lead LFCSP 16-lead TSSOPApplications Base station power amplifiers Process controls (programmable logic controller [PLC] I/O cards) Industrial automation Data acquisition systems

The AD7228A contains eight 8-bit voltage-mode digital-to-analog converters, with output buffer amplifiers and interface logic on a single monolithic chip. No external trims are required to achieve full specified performance for the part.Separate on-chip latches are provided for each of the eight D/A converters. Data is transferred into the data latches through a common 8-bit TTL/CMOS (5 V) compatible input port. Address inputs A0, A1 and A2 determine which latch is loadedwhen WR goes low. The control logic is speed compatible withmost 8-bit microprocessors.Specified performance is guaranteed for input reference voltages from +2 to +10 V when using dual supplies. The part is also specified for single supply +15 V operation using a reference of +10 V and single supply +5 V operation using a reference of +1.23 V. Each output buffer amplifier is capable of developing+10 V across a 2 kΩ load.The AD7228A is fabricated on an all ion-implanted, high-speed, Linear Compatible CMOS (LC2MOS) process which has been specifically developed to integrate high-speed digital logic circuits and precision analog circuits on the same chip.Product Highlights Eight DACs and Amplifiers in Small Package The single-chip design of eight 8-bit DACs and amplifiers allows a dramatic reduction in board space requirements and offers increased reliability in systems using multiple converters. Its pinout is aimed at optimizing board layout with all analog inputs and outputs at one side of the package and all digital inputs at the other. Single or Dual Supply Operation The voltage-mode configuration of the DACs allows single supply operation of the AD7228A. The part can also be operated with dual supplies giving enhanced performance for some parameters. Microprocessor Compatibility The AD7228A has a common 8-bit data bus with individual DAC latches, providing a versatile control architecture for simple interface to microprocessors. All latch enable signals are level triggered and speed compatible with most high performance 8-bit microprocessors.

The AD7609 is an 18-bit, 8-channel, true differential, simultaneous sampling analog-to-digital data acquisition system (DAS). The part contains analog input clamp protection, a second-order antialiasing filter, a track-and-hold amplifier, an 18-bit charge redistribution successive approximation analog-to-digital converter (ADC), a flexible digital filter, a 2.5 V reference and reference buffer, and high speed serial and parallel interfaces.The AD7609 operates from a single 5 V supply and can accommodate ±20 V and ±10 V true bipolar differential input signals while sampling at throughput rates up to 200 kSPS for all channels. The input clamp protection circuitry can tolerate voltages up to ±16.5 V on each analog input pin. The AD7609 has 1 MΩ analog input impedance regardless of sampling frequency. The single supply operation, on-chip filtering, and high input impedance eliminate the need for driver op amps and external bipolar supplies. The AD7609 antialiasing filter has a −3 dB cutoff frequency of 32 kHz and provides 40 dB antialias rejection when sampling at 200 kSPS. The flexible digital filter is pin driven, yields improvements in SNR, and reduces the −3 dB bandwidth. Applications Power line monitoring and protection systems Multiphase motor control Instrumentation and control systems Multiaxis positioning systems Data acquisition systems (DAS)

The AD7988-1/AD7988-5 are 16-bit, successive approximation,analog-to-digital converters (ADC) that operate from a singlepower supply, VDD. The AD7988-1 offers a 100 kSPS throughput,and the AD7988-5 offers a 500 kSPS throughput. They are lowpower, 16-bit sampling ADCs with a versatile serial interfaceport. On the CNV rising edge, they sample an analog input,IN+, between 0 V to VREF with respect to a ground sense, IN−.The reference voltage, REF, is applied externally and can be setindependent of the supply voltage, VDD.The SPI-compatible serial interface also features the ability todaisy-chain several ADCs on a single 3-wire bus using the SDIinput. It is compatible with 1.8 V, 2.5 V, 3 V, or 5 V logic usingthe separate supply, VIO.The AD7988-1/AD7988-5 generics are housed in a 10-leadMSOP or a 10-lead LFCSP with operation specified from −40°Cto +125°C.Applications Automated test equipment Data acquisition systems Medical instruments Machine automation

The AD9146 is a dual, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a sample rate of 1230 MSPS, permitting multicarrier generation up to the Nyquist frequency.The AD9146 TxDAC+® includes features optimized for direct conversion transmit applications, including complex digital modulation, and gain and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators, such as the ADL537x F-MOD series from Analog Devices, Inc. A 3-wire serial port interface provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 8.7 mA to 31.7 mA. The AD9146 comes in a 48-lead LFCSP.PRODUCT HIGHLIGHTS Ultralow noise and intermodulation distortion (IMD) enable high quality synthesis of wideband signals from baseband to high intermediate frequencies. A proprietary DAC output switching technique enhances dynamic performance. The current outputs are easily configured for various single-ended or differential circuit topologies. Compact LVDS digital interface offers reduced width data bus.APPILICATIONS Wireless infrastructure W-CDMA, CDMA2000, TD-SCDMA, WiMAX, GSM, LTE Digital high or low IF synthesis Transmit diversity Wideband communications: LMDS/MMDS, point-to-point

The AD9146 is a dual, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a sample rate of 1230 MSPS, permitting multicarrier generation up to the Nyquist frequency.The AD9146 TxDAC+® includes features optimized for direct conversion transmit applications, including complex digital modulation, and gain and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators, such as the ADL537x F-MOD series from Analog Devices, Inc. A 3-wire serial port interface provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 8.7 mA to 31.7 mA. The AD9146 comes in a 48-lead LFCSP.PRODUCT HIGHLIGHTS Ultralow noise and intermodulation distortion (IMD) enable high quality synthesis of wideband signals from baseband to high intermediate frequencies. A proprietary DAC output switching technique enhances dynamic performance. The current outputs are easily configured for various single-ended or differential circuit topologies. Compact LVDS digital interface offers reduced width data bus.APPILICATIONS Wireless infrastructure W-CDMA, CDMA2000, TD-SCDMA, WiMAX, GSM, LTE Digital high or low IF synthesis Transmit diversity Wideband communications: LMDS/MMDS, point-to-point

The AD9258 is a dual, 14-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC). The AD9258 is designed to support communications applications where high performance, combined with low cost, small size, and versatility, is desired.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers that support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.The ADC output data can be routed directly to the two external 14-bit output ports. These outputs can be set to either 1.8 V CMOS or LVDS.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.The AD9258 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode. Pin compatibility with the AD9268, allowing a simple migration from 14 bits to 16 bits. The AD9258 is also pin compatible with the AD9251, AD9231, and AD9204 family of products for lower sample rate, low power applications.APPLICATIONS Communications Diversity radio systems Multimode digital receivers (3G) GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems General-purpose software radios Broadband data applications Ultrasound Equipment

The AD9265 is a 16-bit, 125 MSPS analog-to-digital converter (ADC). The AD9265 is designed to support communications applications where high performance combined with low cost, small size, and versatility is desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 16-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range.The ADC features a wide bandwidth differential sample-and-hold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate.Combined with power and cost savings over previously available ADCs, the AD9265 is suitable for applications in communications, instrumentation and medical imaging. A differential clock input controls all internal conversion cycles. A duty cycle stabilizer provides the means to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance over a wide range of input clock duty cycles. An integrated voltage reference eases design considerations.The ADC output data format is either parallel 1.8 V CMOS or LVDS (DDR). A data output clock is provided to ensure proper latch timing with receiving logic.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface. Flexible power-down options allow significant power savings, when desired. An optional on-chip dither function is available to improve SFDR performance with low power analog input signals.The AD9265 is available in a Pb-free, 48-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.APPLICATIONS Communications Multimode digital receivers (3G) GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA Smart antenna systems General-purpose software radios Broadband data applications Ultrasound equipmentPRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock duty cycle stabilizer, DCS, power-down, test modes, and voltage reference mode. Pin compatibility with the AD9255, allowing a simple migration from 16 bits down to 14 bits.

The AD9265 is a 16-bit, 125 MSPS analog-to-digital converter (ADC). The AD9265 is designed to support communications applications where high performance combined with low cost, small size, and versatility is desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic to provide 16-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range.The ADC features a wide bandwidth differential sample-and-hold analog input amplifier supporting a variety of user-selectable input ranges. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate.Combined with power and cost savings over previously available ADCs, the AD9265 is suitable for applications in communications, instrumentation and medical imaging. A differential clock input controls all internal conversion cycles. A duty cycle stabilizer provides the means to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance over a wide range of input clock duty cycles. An integrated voltage reference eases design considerations.The ADC output data format is either parallel 1.8 V CMOS or LVDS (DDR). A data output clock is provided to ensure proper latch timing with receiving logic.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface. Flexible power-down options allow significant power savings, when desired. An optional on-chip dither function is available to improve SFDR performance with low power analog input signals.The AD9265 is available in a Pb-free, 48-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.APPLICATIONS Communications Multimode digital receivers (3G) GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, and TD-SCDMA Smart antenna systems General-purpose software radios Broadband data applications Ultrasound equipmentPRODUCT HIGHLIGHTS On-chip dither option for improved SFDR performance with low power analog input. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock duty cycle stabilizer, DCS, power-down, test modes, and voltage reference mode. Pin compatibility with the AD9255, allowing a simple migration from 16 bits down to 14 bits.