Dual, 12-Bit, 80 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter Features: 1.8 V supply operation Low power: 115 mW per channel at 125 MSPS with scalable power options SNR = 71 dBFS (to Nyquist) SFDR = 93 dBc at 70 MHz DNL = −0.1 LSB to +0.2 LSB (typical); INL = ±0.4 LSB (typical) Serial LVDS (ANSI-644, default) and low power, reduced range option (similar to IEEE 1596.3) 650 MHz full power analog bandwidth 2 V p-p input voltage range Serial port control Full chip and individual channel power-down modes Flexible bit orientation Built-in and custom digital test pattern generation Clock divider Programmable output clock and data alignment Programmable output resolution Standby mode

Quad 14-Bit nanoDAC+ with 2 ppm/C Reference, I2C Interface Features: High relative accuracy (INL): ±2 LSB maximum at 16 bits Low drift 2.5 V reference: 2 ppm/°C typical Tiny package: 3 mm × 3 mm, 16-lead LFCSP Total unadjusted error (TUE): ±0.1% of FSR maximum Offset error: ±1.5 mV maximum Gain error: ±0.1% of FSR maximum High drive capability: 20 mA, 0.5 V from supply rails User selectable gain of 1 or 2 (GAIN pin) Reset to zero scale or midscale (RSTSEL pin) 1.8 V logic compatibility Low glitch: 0.5 nV-sec 400 kHz I2C-compatible serial interface Low power: 3.3 mW at 3 V 2.7 V to 5.5 V power supply −40°C to +105°C temperature range

Quad 16-/14-/12-Bit nanoDAC+ with 2 ppm/C Reference, I2C Interface

Quad, Current-Output, Serial-Input 16-/14-Bit DACs Features: 16-bit resolution INL of ±1 LSB (B Grade) 2 mA full-scale current ± 20%, with VREF = ±10 V 0.9 μs settling time to ±0.1% 12 MHz multiplying bandwidth Midscale glitch of −1 nV-sec Midscale or zero-scale reset Four separate, 4-quadrant multiplying reference inputs Compact 28-lead SSOP and 32-lead LFCSP See data sheet for additional featuresAD5544-EP supports defense and aerospace applications (AQEC standard) Download AD5544-EP Data Sheet (pdf) Military temperature range (−55°C to +125°C) Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request V62/12663 DSCC Drawing Number

Low Voltage Controller for Touch Screens Features: 4-wire touch screen interface 1.6 V to 3.6 V operation Median and averaging filter to reduce noise Automatic conversion sequencer and timer User-programmable conversion parameters Auxiliary analog input/battery monitor (0.5 V to 5 V) 1 optional GPIO Interrupt outputs (INT, PENIRQ) Touch-pressure measurement Wake-up on touch function Shutdown mode: 6 μA maximum 12-ball, 1.6 mm × 2 mm WLCSP 16-lead, 4 mm × 4 mm LFCSP

1.6 V, Micropower 12-/10-/8-Bit ADCs

True Accuracy, 16-Bit 12 V/15 V, Serial Input Voltage Output D/A Converter Features: Full 16-bit performance 1 LSB max INL and DNL Output voltage range up to ±14 V On-board reference buffers, eliminating the need for a negative reference Temperature ranges of −40°C to +85°C for A/B version/−40°C to +125°C for W/Y version Controlled output during power-on Settling time of 10 µs to 0.003% Clear function to 0 V Asynchronous update of outputs (LDAC pin) Power-on reset Serial data output for daisy chaining Data readback facility

Dual 14-Bit, 20/40/65 MSPS, 3 V Analog-to-Digital Converter Features: Integrated Dual 14-Bit Analog-to-Digital Converters Single 3 V Supply Operation (2.7 V to 3.6 V) SNR = 71.6 dBc (to Nyquist, AD9248-65) SFDR = 80 dBc (to Nyquist, AD9248-65) Low Power: 300 mW at 65 MSPS Differential Input with 500 MHz 3 dB Bandwidth Exceptional Cross Talk Immunity > 85 dB On-Chip Reference and SHA Flexible Analog Input: 1 Vp-p to 2 Vp-p Range Offset Binary or Twos Complement Data Format Clock Duty Cycle Stabilizer Output datamux option

Quad, 12-Bit, 170 MSPS/210 MSPS/250 MSPS Serial Output 1.8 V ADC Features:4 ADCs in 1 packageCoded serial digital outputs with ECC per channelOn-chip temperature sensor95 dB channel-to-channel crosstalkSNR = 65 dBFS with AIN = 85 MHz at 250 MSPSSFDR = 77 dBc with AIN = 85 MHz at 250 MSPSExcellent linearityDNL = 0.3 LSB (typical)INL = 0.7 LSB (typical)See data sheet for additional features

24-Bit, 8.5 mW, 109 dB, 128 kSPS/64 kSPS/32 kSPS ADCs Features: Download AD7766-2-KGD Data Sheet. Available as Known Good Die and fully guaranteed in data sheet specifications Oversampled successive approximation (SAR) architecture High performance ac and dc accuracy, low power 115.5 dB dynamic range, 32 kSPS (AD7766-2) 112.5 dB dynamic range, 64 kSPS (AD7766-1) 109.5 dB dynamic range, 128 kSPS (AD7766) −112 dB THD Exceptionally low power 8.5 mW, 32 kSPS (AD7766-2) 10.5 mW, 64 kSPS (AD7766-1) 15 mW, 128 kSPS (AD7766) High dc accuracy 24 bits, no missing codes (NMC) INL: ±6 ppm (typical), ±15 ppm (maximum) Low temperature drift Zero error drift: 15 nV/°C Gain error drift: 0.4 ppm/°C See data sheet for additional features