400 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer Features: 400 MSPS internal clock speed Integrated 10-bit DAC 32-bit tuning word Phase noise ≤ –120 dBc/Hz at 1 kHz offset (DAC output) Excellent dynamic performance >75 dB SFDR at 160 MHz (±100 kHz offset) AOUT Serial input/output (I/O) control 1.8 V power supply Software and hardware controlled power-down 48-lead TQFP/EP package PLL REFCLK multiplier (4× to 20×) Internal oscillator; can be driven by a single crystal Phase modulation capability Multichip synchronization

Digital Potentiometer ICs 7-BIT RDAC WITH UP/DWN CONTROL

Low Power HDMI/DVI Transmitter with Consumer Electronic Control (CEC) Features: Low power HDMI/DVI transmitter ideal for portable applications CEC controller and expanded message buffer (3 messages) reduces system overhead Incorporates HDMI v.1.3 (x.v.Color™) technology Compatible with DVI v.1.0 Optional embedded HDCP keys to support HDCP 1.3 1.8 V and 1.2V supplies for ultralow operating power Video/audio inputs accept logic levels from 1.8 V to 3.3 V 80 MHz operation supports all video and graphics resolutions from 480i to 1080i Programmable two-way color space converter Supports RGB, YCbCr, DDR Supports ITU656-based embedded syncs Automatic input video format timing detection (CEA-861E) See data sheet for additional features

Video ICs 3 DAC 10-bit HDTV Video Encoder

Low Power, Chip Scale 10-Bit SD/HD Video Encoder Features: 3 high quality, 10-bit video DACs 16× (216 MHz) DAC oversampling for SD 8× (216 MHz) DAC oversampling for ED 4× (297 MHz) DAC oversampling for HD 37 mA maximum DAC output current Multiformat video output support Composite (CVBS) and S-Video (Y-C) Component YPrPb (SD, ED, and HD) Component RGB (SD, ED, and HD) See datasheet for additional features

Digital Potentiometer ICs DUAL 8-BIT POTENTIOMETER

Nonvolatile, I2C-Compatible 64-Position, Digital Potentiometer Features: Nonvolatile memory maintains wiper settings  64-position digital potentiometer  Compact MSOP-10 (3 mm × 4.9 mm)  I2C-compatible interface VLOGIC pin provides increased interface flexibility  End-to-end resistance 1 kΩ, 10 kΩ, 50 kΩ, 100 kΩ Resistance tolerance stored in EEPROM (0.1% accuracy) Power-on EEPROM refresh time <1 ms Software write protect command  Address Decode Pin AD0 and Address Decode Pin AD1 allow four packages per bus  100-year typical data retention at 55°C  Wide operating temperature −40°C to +85°C 

Gate Drivers 4A,Dual Ch Gate Drvr 7V Nominal UVLO

SigmaDSP Compact Digital Audio Processor with Extended Internal Memory Features: Qualified for automotive applications High performance SigmaDSP core enables low latency and audio applications Active Noise Cancellation (ANC) Echo-Canceller and Noise Reduction (ECNR) Surround sound algorithms Features SigmaStudio, a proprietary graphical Integrated Development Environment (IDE), for the development of custom signal flows Comprehensive Toolbox of pre-defined building blocks Faster design time with proven solutions Intuitive system design 294.912 MHz, 32-bit SigmaDSP core at 1.2 V 24 kWords of program memory 80 kWords of parameter/data RAM 6144 SIMD instructions per sample at 48 kHz 1600 ms digital audio delay pool at 48 kHz Audio I/O and routing 4 serial input ports, 4 serial output ports 48-channel, 32-bit digital I/O up to a sample rate of 192 kHz Flexible configuration of I2S, left and right justified, and up to 16-channel TDM formats on serial data pins 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and 139 dB dynamic range Stereo S/PDIF input and output at 192 kHz Four PDM microphone input channels Multichannel, byte addressable TDM serial ports Clock oscillator for generating master clock from crystal Integer PLL and flexible clock generators Integrated die temperature sensor I2C and SPI control interfaces (both slave and master) Standalone operation Self-boot from serial EEPROM 6-channel, 10-bit SAR auxiliary control ADC 14 multipurpose pins for digital controls and outputs On-chip regulator for generating 1.2 V from 1.8 V to 3.3 V supply 72-lead, 10 mm × 10 mm LFCSP package with 5.3 mm exposed pad Temperature range: −40°C to +105°C

Three ADCs, One DAC, Low Power Codec with Audio DSPs Features: Programmable FastDSP audio processing engine Up to 768 kHz sample rate Biquad filters, limiters, volume controls, mixing Tensilica HiFi 3z DSP core Quad MAC per cycle: 24 x 24-bit multiplier and 64-bit accumulator Flexible power operation mode: 24.576 MHz, 49.152 MHz, 73.728 MHz, and 98.304 MHz 336 kB total memory JTAG debug and trace Low latency, 24-bit ADCs and DAC 106 dB SNR (signal through ADC with A-weighted filter) 110 dB combined SNR (signal through DAC and headphone with A-weighted filter) Programmable double precision MAC engine for maximum 24-stage equalizer Serial port sample rates from 8 kHz to 768 kHz 5 μs group delay (fS = 768 kHz) analog in to analog out with FastDSP bypass (zero instructions) 3 differential or single-ended analog inputs, configurable as microphone or line inputs 8 digital microphone inputs Analog differential audio output, configurable as either line output or headphone drive 2 PDM output channels PLL supporting any input clock rate from 30 kHz to 36 MHz 4 channel asynchronous sample rate converters (ASRCs) 2, 16-channel serial audio ports supporting I2S, left justified, right justified, or up to TDM16 (TDM12 in Turbo mode) 8 interpolators and 8 decimators with flexible routing Power supplies Analog AVDD at 1.8 V typical Digital I/O IOVDD at 1.1 V to 1.98 V Digital DVDD at 0.85 V to 1.21 V Headphone HPVDD at 1.8 V typical Headphone HPVDD_L at 1.2 V to HPVDD Control/communication interfaces I2C, SPI, or UART control ports Master quad SPI (QSPI) UART communication port Self-boot from QSPI flash Flexible GPIO and IRQ 56-ball, 0.35 mm pitch, 2.980 mm × 2.679 mm WLCSP