The AD6623 is a four channel Transmit Signal Processor (TSP) that creates high bandwidth data for Transmit Digital-to-Analog Converters (TxDAC®s) from baseband data provided by a Digital Signal Processor (DSP). Modern TxDACs have achieved sufficiently high sampling rates, analog bandwidth, and dynamic range to create the first Intermediate Frequency (IF) directly. The AD6623 synthesizes multi-carrier and multi-standard digital signals to drive these TxDACs. The RAM-based architecture allows easy reconfiguration for multi-mode applications. Modulation, pulse-shaping and anti-imaging filters, static equalization, and tuning functions are combined in a single, cost-effective device. Digital IF signal processing provides repeatable manufacturing, higher accuracy, and more flexibility than comparable high dynamic range analog designs.The AD6623 is pin compatible to the AD6622 and can operate in AD6622 compatible control register mode. Each TSP has five cascaded signal processing elements: a programmable interpolating RAM Coefficient Filter (RCF), a programmable Scale and Power Ramp, a programmable 5th order Cascaded Integrator Comb (CIC5) interpolating filter, a flexible 2nd order Re-Sampling Cascaded Integrator Comb filter (rCIC2), and a Numerically Controlled Oscillator/tuner (NCO). The AD6623 has four identical digital TSPs complete with synchronization circuitry and cascadable wideband channel summation. The outputs of the four TSPs are summed and scaled on-chip. In multi-carrier channel wideband transmitters, a bi-directional bus allows the Parallel (wideband) IF Input/Output to drive a second DAC. In this operational mode two AD6623 channels drive one DAC and the other two AD6623 channels drive a second DAC. Multiple AD6623s may be combined by driving the INOUT[17:0] of the succeeding with the OUT[17:0] of the preceding chip. The INOUT[17:0] can alternatively be masked off by software to allow preceding AD6623s outputs to be ignored.Each channel accepts input data from independent serial ports that may be connected directly to the serial port of Digital Signal Processor (DSP) chips. The AD6623 utilizes a 3.3V I/O power supply and a 2.5V core power supply. All I/O pins are 5V tolerant. All control registers and coefficient values are programmed through a generic microprocessor interface. Intel and Motorola microprocessor bus modes are supported. All inputs and outputs are LVCMOS compatible.Applications Cellular/PCS Base Stations Micro/Pico Cell Base Stations Wireless Local Loop Base Stations Multicarrier, Multimode Digital Transmit GSM, EDGE, IS136, PHS, IS95, TDS CDMA, UMTS, CDMA2000 Phased Array Beam Forming Antennas Software Defined Radio Tuning Resolution Better than 0.025 Hz Real or Complex Outputs

Digital Potentiometer ICs 7-BIT RDAC WITH UP/DWN CONTROL

400 MSPS 10-Bit DAC 1.8 V CMOS Direct Digital Synthesizer Features: 400 MSPS internal clock speed Integrated 10-bit DAC 32-bit tuning word Phase noise ≤ –120 dBc/Hz at 1 kHz offset (DAC output) Excellent dynamic performance >75 dB SFDR at 160 MHz (±100 kHz offset) AOUT Serial input/output (I/O) control 1.8 V power supply Software and hardware controlled power-down 48-lead TQFP/EP package PLL REFCLK multiplier (4× to 20×) Internal oscillator; can be driven by a single crystal Phase modulation capability Multichip synchronization

Stereo PDM to I2S/TDM Converter Features: 2 channels of PDM audio inputs from digital microphones 64× decimation ratio of PDM to PCM audio data 24-bit resolution to support high sound pressure level (SPL) microphones 126 dB A-weighted SNR 4 kHz to 96 kHz output sampling rate Bit clock rates of 64×, 128×, 192×, 256×, 384×, or 512× the output sampling rate Automatic PDM clock generation Automatic power-down when BCLK is removed 0.36 mA DVDD operating current at 48 kHz sampling rate and 1.8 V supply Slave I2S or TDM output interface Up to TDM-16 supported Configurable TDM slots I/O supply voltage from 1.70 V to 3.63 V DVDD core supply voltage from 1.10 V to 1.98 V 4 μA typical DVDD shutdown current 9-ball, 1.26 mm × 1.26 mm, 0.4 mm pitch WLCSP Power-on reset

The AD8400 / AD8402 / AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kOhm, 10 kOhm, 50 kOhm or 100 kOhm has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.APPLICATIONS Mechanical potentiometer replacement Programmable filters, delays, time constants Volume control, panning Line impedance matching Power supply adjustment

The SSM2315 is a fully integrated, high efficiency, Class-D audioamplifier. It is designed to maximize performance for mobilephone applications. The application circuit requires a minimumof external components and operates from a single 2.5 V to 5.5 Vsupply. It is capable of delivering 3 W of continuous output powerwith 103 dB.Spread-spectrum pulse density modulation is used to providelower EMI-radiated emissions compared with other Class-Darchitectures.The SSM2315 has a micropower shutdown mode with a typicalshutdown current of 20 nA. Shutdown is enabled by applyinga logic low to the SD pin.The device also includes pop-and-click suppression circuitry.This suppression circuitry minimizes voltage glitches at theoutput during turn-on and turn-off, reducing audible noiseon activation and deactivation.The fully differential input of the SSM2315 provides excellentrejection of common-mode noise on the input. Input couplingcapacitors can be omitted if the dc input common-mode voltageis approximately VDD/2.The default gain of the SSM2315 is 6 dB, but users can reduce thegain by using a pair of external resistors.The SSM2315 is specified over the industrial temperature range of?40?C to +85?C. It has built-in thermal shutdown and outputshort-circuit protection. It is available in a 9-ball, 1.5 mm ? 1.5 mmwafer level chip scale package (WLCSP). Applications Mobile phones MP3 players Portable gaming Portable electronics Educational toys

The ADV8003 is a multiple input video signal processor that can de-interlace and scale SD, ED, or HD video data to HD formats, generate a bitmap on-screen display (OSD) and output the video with OSD overlaid on two High Definition Multimedia Interface (HDMI) transmitters and a video encoder.Video can be input into the ADV8003 in a number of ways: using the 48-bit TTL pixel port, using the 24-bit external OSD TTL pixel port, or from a device with a HDMI transmitter such as the ADV7850. The ADV8003 supports many of the formats outlined in the CEA-861 and VESA specifications, as well as several other widely used timing formats.Using two external DDR2 memories, the ADV8003 can perform high performance, motion adaptive interlaced to progressive conversion on SD and HD content. Using a single DDR2 memory, the HD de-interlacing is limited to intrafield.The ADV8003 features primary and secondary video scalers that enable simultaneous output of multiple different resolutions. Detail enhancement and image enhancing techniques such as random, mosquito, and block noise reduction allow for improved final image quality. The frame rate converter of the ADV8003 allows the conversion between common frame rates with support to output two different frame rates simultaneously under certain conditions.The ADV8003 has a flexible digital core that allows the user to configure the part in several different modes: using a single video processing channel, using dual video processing channels, or displaying OSD on multiple outputs of different resolutions. The ADV8003 can accept OSD information from either an external OSD source on the 24-bit external OSD TTL pixel data input or internally generate a high quality, bitmap-based OSD. The internal OSD is highly flexible and allows the system designer to easily incorporate features like scrolling text and animation in various color depths up to 24-bit true color.Analog Devices, Inc., provides an OSD development tool (Blimp) to assist in the design, debug, and emulation of the OSD prior to integration with the system application. When the design is complete, the OSD development tool automatically generates code to which system APIs can be added before integration with the system application and an OSD design resource, which must be downloaded to an external SPI flash memory.Video can be output from the ADV8003 using one or both of the HDMI transmitters and/or the 6-DAC SD/HD video encoder. The flexible multiplexing in the part allows simultaneous output of HD formats on the HDMI transmitters and on the HD DACs (for example, 1080p) with SD formats on the SD DACs (for example, 480i).Both of the HDMI transmitters on the ADV8003 support all mandatory and many optional 3D video resolutions and audio return channels (ARC). Each transmitter also features a full CEC master. The ADV8003 can receive up to six channels of I2S, S/PDIF, direct stream digital (DSD), and high bit rate (HBR). The six 12-bit NSV? video DACs allow for composite (CVBS), S-Video (Y/C), and component (YPrPb) analog outputs in standard, enhanced, and high definition video formats. Oversampling of 216 MHz (SD and ED) and 297 MHz (HD) removes the requirement for external output filtering.The ADV8003 can also support 30-bit TTL in and 30-bit TTL out mode for professional applications.The ADV8003 supports the I2C? protocol for communication with the system microcontroller.APPLICATIONS High end A/V receivers Upconverting DVD players/recorders Blu-ray players/recorders Set-top boxes Video conferencing Standalone video processors HDMI splitters

The ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 are micropower, 4-channel digital isolators based on the Analog Devices, Inc., iCoupler® technology. Combining high speed, complementary metal oxide semiconductor (CMOS) and monolithic air core transformer technologies, these isolation components provide outstanding performance characteristics superior to the alternatives, such as optocoupler devices. As shown in Figure 3 in the data sheet, in standard operating mode, when ENx = 0 (internal refresh enabled), the current per channel is less than 10 μA. When ENx = 1 (internal refresh disabled), the current per channel drops to less than 1 μA.The ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 family of quad 2.5 kV digital isolation devices are packaged in a small 16-lead QSOP and 20-lead SSOP, freeing almost 70% of board space compared to isolators packages in wide body SOIC packages.The devices withstand high isolation voltages and meet regulatory requirements, such as UL and CSA standards. In addition to the space savings, the ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 operate with supplies as low as 2.25 V.Despite the low power consumption, all models of the ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447 provide low, pulse width distortion at <8 ns. In addition, every model has an input glitch filter to protect against extraneous noise disturbances.APPLICATIONS General-purpose, low power multichannel isolation 1 MHz, low power peripheral interface (SPI) 4 mA to 20 mA loop process controls

Digital Potentiometer ICs DUAL 8-BIT POTENTIOMETER

RF MIXERS/MULTIPLIERS RF IC'S;