5 KV rms Isolated Precision Half-Bridge Driver, 4 A Output Features: 4 A peak output current Working voltage High-side or low-side relative to input: 537 V peak High-side to low-side differential: 800 V peak High frequency operation: 1 MHz maximum  3.3 V to 5 V CMOS input logic 4.5 V to 18 V output drive  UVLO at 2.5 V VDD1 ADuM3223A/ADuM4223A UVLO at 4.1 V VDD2 ADuM3223B/ADuM4223B UVLO at 7.0 V VDD2 ADuM3223C/ADuM4223C UVLO at 11.0 V VDD2 Precise timing characteristics  54 ns maximum isolator and driver propagation delay 5 ns maximum channel-to-channel matching CMOS input logic levels  High common-mode transient immunity:>25 kV/μs Enhanced system-level ESD performance per IEC 61000-4-x  High junction temperature operation: 125°C  Thermal shutdown protection  Default low output Safety and regulatory approvals ADuM4223 wide-body, 16-lead SOIC UL recognition per UL 1577  5000 V rms for 1 minute SOIC long package  CSA Component Acceptance Notice 5A  VDE certificate of conformity  DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 VIORM = 849 V peak  Qualified for automotive applications

Dual-Channel Isolators with Integrated DC-to-DC Converter (1/1 channel directionality) Features: isoPower® integrated isolated DC/DC converter Regulated 3V or 5V output Up to 500 mW output power 16-lead SOIC package with 7.6 mm creepage Dual dc-to-25 Mbps (NRZ) signal isolation channels High temperature operation: 105°C maximum High common-mode transient immunity: > 25 kV/µsSafety and regulatory approvals UL recognition 2500 V rms for 1 minute per UL 1577 VDE cert of conformity (pending) IEC 60747-5-2 (VDE V 0884-10):2006-12 VIORM = 560 VPEAK See data sheet for additional features

Digital PAL/NTSC Video Encoder with 10-Bit SSAF and Advanced Power Management Features: ITU-R BT601/656 YCrCb to PAL/NTSC Video Encoder High Quality 10-Bit Video DACs SSAF (Super Sub-Alias Filter) Advanced Power Management Features CGMS (Copy Generation Management System) WSS (Wide Screen Signalling) Simultaneous Y, U, V, C Output Format NTSC-M, PAL-M/N, PAL-B/D/G/H/I, PAL-60 Single 27 MHz Clock Required (x2 Oversampling) 80 dB Video SNR 32-Bit Direct Digital Synthesizer for Color Subcarrier

Quad-Channel Digital Isolator (3/1 Channel Directionality) Features: Qualified for automotive applications Low power operation Bidirectional communication 3 V/5 V level translation High temperature operation: 125°C High data rate: dc to 90 Mbps (NRZ) Precise timing characteristics High common-mode transient immunity: >25 kV/μs See data sheet for additional features

Very Low Noise, Low Distortion Active RC Quad Universal Filter Features: Continuous Time—No Clock Four 2nd Order Filter Sections, 20kHz to 300kHz Center Frequency Butterworth, Chebyshev, Elliptic or Equiripple Delay Response Lowpass, Bandpass, Highpass Responses 99dB Typical S/N, ±5V Supply (Q = 1) 93dB Typical S/N, Single 5V Supply (Q = 1) Rail-to-Rail Input and Output Voltages DC Accurate to 3mV (Typ) ±0.5% Typical Center Frequency Accuracy “Zero-Power” Shutdown Mode Single or Dual Supply, 5V to 10V Total Resistor-Programmable fO, Q, Gain

SigmaDSP Compact Digital Audio Processor with Extended Internal Memory Features: Qualified for automotive applications High performance SigmaDSP core enables low latency and audio applications Active Noise Cancellation (ANC) Echo-Canceller and Noise Reduction (ECNR) Surround sound algorithms Features SigmaStudio, a proprietary graphical Integrated Development Environment (IDE), for the development of custom signal flows Comprehensive Toolbox of pre-defined building blocks Faster design time with proven solutions Intuitive system design 294.912 MHz, 32-bit SigmaDSP core at 1.2 V 24 kWords of program memory 80 kWords of parameter/data RAM 6144 SIMD instructions per sample at 48 kHz 1600 ms digital audio delay pool at 48 kHz Audio I/O and routing 4 serial input ports, 4 serial output ports 48-channel, 32-bit digital I/O up to a sample rate of 192 kHz Flexible configuration of I2S, left and right justified, and up to 16-channel TDM formats on serial data pins 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and 139 dB dynamic range Stereo S/PDIF input and output at 192 kHz Four PDM microphone input channels Multichannel, byte addressable TDM serial ports Clock oscillator for generating master clock from crystal Integer PLL and flexible clock generators Integrated die temperature sensor I2C and SPI control interfaces (both slave and master) Standalone operation Self-boot from serial EEPROM 6-channel, 10-bit SAR auxiliary control ADC 14 multipurpose pins for digital controls and outputs On-chip regulator for generating 1.2 V from 1.8 V to 3.3 V supply 72-lead, 10 mm × 10 mm LFCSP package with 5.3 mm exposed pad Temperature range: −40°C to +105°C

Three ADCs, One DAC, Low Power Codec with Audio DSPs Features: Programmable FastDSP audio processing engine Up to 768 kHz sample rate Biquad filters, limiters, volume controls, mixing Tensilica HiFi 3z DSP core Quad MAC per cycle: 24 x 24-bit multiplier and 64-bit accumulator Flexible power operation mode: 24.576 MHz, 49.152 MHz, 73.728 MHz, and 98.304 MHz 336 kB total memory JTAG debug and trace Low latency, 24-bit ADCs and DAC 106 dB SNR (signal through ADC with A-weighted filter) 110 dB combined SNR (signal through DAC and headphone with A-weighted filter) Programmable double precision MAC engine for maximum 24-stage equalizer Serial port sample rates from 8 kHz to 768 kHz 5 μs group delay (fS = 768 kHz) analog in to analog out with FastDSP bypass (zero instructions) 3 differential or single-ended analog inputs, configurable as microphone or line inputs 8 digital microphone inputs Analog differential audio output, configurable as either line output or headphone drive 2 PDM output channels PLL supporting any input clock rate from 30 kHz to 36 MHz 4 channel asynchronous sample rate converters (ASRCs) 2, 16-channel serial audio ports supporting I2S, left justified, right justified, or up to TDM16 (TDM12 in Turbo mode) 8 interpolators and 8 decimators with flexible routing Power supplies Analog AVDD at 1.8 V typical Digital I/O IOVDD at 1.1 V to 1.98 V Digital DVDD at 0.85 V to 1.21 V Headphone HPVDD at 1.8 V typical Headphone HPVDD_L at 1.2 V to HPVDD Control/communication interfaces I2C, SPI, or UART control ports Master quad SPI (QSPI) UART communication port Self-boot from QSPI flash Flexible GPIO and IRQ 56-ball, 0.35 mm pitch, 2.980 mm × 2.679 mm WLCSP

Stereo PDM to I2S/TDM Converter Features: 2 channels of PDM audio inputs from digital microphones 64× decimation ratio of PDM to PCM audio data 24-bit resolution to support high sound pressure level (SPL) microphones 126 dB A-weighted SNR 4 kHz to 96 kHz output sampling rate Bit clock rates of 64×, 128×, 192×, 256×, 384×, or 512× the output sampling rate Automatic PDM clock generation Automatic power-down when BCLK is removed 0.36 mA DVDD operating current at 48 kHz sampling rate and 1.8 V supply Slave I2S or TDM output interface Up to TDM-16 supported Configurable TDM slots I/O supply voltage from 1.70 V to 3.63 V DVDD core supply voltage from 1.10 V to 1.98 V 4 μA typical DVDD shutdown current 9-ball, 1.26 mm × 1.26 mm, 0.4 mm pitch WLCSP Power-on reset

Very Low Noise, Differential Amplifier and 5MHz Lowpass Filter Features: Programmable Differential Gain via Two External Resistors Adjustable Output Common Mode Voltage Operates and Specified with 3V, 5V, ±5V Supplies 0.5dB Ripple 4th Order Lowpass Filter with 5MHz Cutoff 82dB S/N with 3V Supply and 2VP-P Output Low Distortion, 2VP-P, 800Ω Load 1MHz: 93dBc 2nd, 96dBc 3rd Fully Differential Inputs and Outputs Compatible with Popular Differential Amplifier Pinouts Available in an SO-8 Package

16-Bit, 15 MSPS, Module Data Acquisition Solution Features: Integrated fully differential ADC driver with signal scaling Wide input common range High common-mode rejection Single-ended to differential conversion 2.048 V input range with 4.096 V REFBUF Critical passive components 0.005% precision matched resistor array for FDA 9 mm × 9 mm, 0.8 mm pitch, 100-ball BGA package 4× footprint reduction versus discrete solution Low power, dynamic power scaling, power-down mode 143 mW typical at 15 MSPS Throughput: 15 MSPS, no pipeline delay INL: 0.4 LSB typical, 1 LSB maximum SINAD: 89 dB typical at 1 kHz THD: 115 dB at 1 kHz, 106 dB at 400 kHz Gain error: 0.005% FS typical Gain error drift: 1 ppm/C maximum On-board reference buffer with VCMO generation Serial LVDS interface Wide operating temperature range: 40C to +85C