4-Channel, 24 GHz, Receiver Downconverter Features: Integrated baluns for single-ended receiver (Rx) inputs and local oscillator (LO) input Rx channel gain: 22 dB Noise figure (NF): 10 dB P1dB: −10 dBm LO input range: −8 dBm to +5 dBm Rx to IF isolation: 30 dB RF signal bandwidth: 250 MHz Rx output impedance: 900 Ω differential LO input buffer: 24 GHz RF and LO S11 at 50 Ω: −5 dB Temperature sensor with analog output: ±5° Electrostatic discharge (ESD) performance Human body model (HBM): 2000 V Charged device model (CDM): 500 V Qualified for automotive applications

The AD5290 is one of the few high voltage, high performance, and compact digital potentiometers1 in the market at present. This device can be used as a programmable resistor or resistor divider. The AD5290 performs the same electronic adjustment function as mechanical potentiometers, variable resistors, and trimmers, with enhanced resolution, solid-state reliability, and superior temperature stability.With digital rather than manual control, the AD5290 provides layout flexibility and allows closed-loop dynamic controllability.The AD5290 is available in MSOP-10 package and has 10 kΩ, 50 kΩ, and 100 kΩ options. All parts are guaranteed to operate over the –40°C to +125°C extended automotive temperature range.Applications High voltage DAC Programmable power supply Programmable gain and offset adjustment Programmable filters and delays Actuator control Audio volume control Mechanical potentiometer replacement1 The RDAC segmentation is protected by U.S. Patent Number 5,495,245.

VOLTAGE DIGITAL POTENTIOMETER ROHS COMPLIANT: YES

Telecom Interface ICs Single DS3/E3/STS-1 Line Interface Unit

The SSM2380 is a fully integrated, high efficiency, stereo, Class-D audio amplifier. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 2 W of continuous output power with 100 dB.Spread-spectrum pulse density modulation is used to provide lower EMI-radiated emissions compared with other Class-D architectures. An added benefit of spread-spectrum Σ-Δ modu-lation is that no synchronization (SYNC) is needed when using multiple Class-D amplifiers. For applications that require long speaker cables (>10 cm), the SSM2380 includes a user-selectable ultralow EMI emissions mode that eliminates the need for EMI filters at the Class-D outputs.The SSM2380 has a micropower shutdown mode with a typicalshutdown current of 20 nA. Shutdown is enabled by applying alogic low to the SD pin or through an optional independent channel soft shutdown via I2C.The device also includes pop-and-click suppression circuitry. Thissuppression circuitry minimizes voltage glitches at the outputduring turn-on and turn-off, reducing audible noise on activationand deactivation.The fully differential inputs of the SSM2380 provides excellentrejection of common-mode noise on the input. Input couplingcapacitors can be omitted if the dc input common-mode voltage isapproximately VDD/2.The SSM2380 is specified over the commercial temperature range(−40°C to +85°C). It has built-in thermal shutdown and outputshort-circuit protection. It is available in a 16-ball, 2 mm × 2 mmwafer level chip scale package (WLCSP).Applications Mobile phones MP3 players Portable electronics

IC IF DIGITIZING SUBSYSTEM 48LQFP; IC Function:IF Digitizing Subsystem; Supply Voltage Min:2.7V; Supply Voltage Max:3.6V; IC Package Type:LQFP; No. of Pins:48Pins; Operating Temperature Min:-40°C; Operating Temperature Max:85°C; Packaging:Each; Product Range:-; Automotive Qualification Standard:-; MSL:MSL 3 - 168 hours; SVHC:No SVHC (20-Jun-2016)

DIGITAL POT 10KOHM DUAL LFCSP-16; End To End Resistance:10kohm; No. of Pots:Dual; Control Interface:I2C; Track Taper:Logarithmic; Resistance Tolerance:± 8%; Supply Voltage Min:2.3V; Supply Voltage Max:5.5V; Potentiometer IC Case Style:LFCSP; No. of Pins:16Pins; No. of Steps:256; Temperature Coefficient:± 35ppm/°C; Operating Temperature Min:-40°C; Operating Temperature Max:125°C; Packaging:Each; Product Range:Dual 256-Tap Non-Volatile Digital Pots; Automotive Qualification Standard:-; MSL:MSL 3 - 168 hours; SVHC:No SVHC (20-Jun-2016)

32BIT SIGMADSP AUDIO 16K/48K / REEL

Low Power HDMI/DVI Transmitter with Consumer Electronic Control (CEC) Features: Low power HDMI/DVI transmitter ideal for portable applications CEC controller and expanded message buffer (3 messages) reduces system overhead Incorporates HDMI v.1.3 (x.v.Color™) technology Compatible with DVI v.1.0 Optional embedded HDCP keys to support HDCP 1.3 1.8 V and 1.2V supplies for ultralow operating power Video/audio inputs accept logic levels from 1.8 V to 3.3 V 80 MHz operation supports all video and graphics resolutions from 480i to 1080i Programmable two-way color space converter Supports RGB, YCbCr, DDR Supports ITU656-based embedded syncs Automatic input video format timing detection (CEA-861E) See data sheet for additional features

The AD6636 is a (Digital) Receive Signal Processor intended for direct IF sampling or highly sampled baseband radios requiring wide-bandwidth input signals. It has been optimized for the demanding filtering requirements of wideband standards like, CDMA2000, UMTS, and TD-SCDMA. The AD6636 is designed to be used as part of radio system that uses either an IF sampling ADC, or a baseband sampling ADC.The AD6636 has the following signal processing stages: a Frequency Translator, a 5th order Cascaded Integrated Comb filter, two sets of Cascaded Fixed Coefficient Finite Impulse Response (FIR) and Half Band filters, three cascaded programmable coefficient Sum of Product FIR filters, an Interpolating Half Band Filter (LHB) and a digital Automatic Gain Control (AGC) Block. Multiple modes are supported for clocking data into and out of the chip to provide flexibility for interfacing to a wide variety of digitizers. Programming and control is accomplished via serial or microport interfaces.The AD6636 features a fractional clock multiplier that uses the ADC clock to produce a digital down converter master clock up to 200 MHz. This internal phased-locked loop (PLL) allows optimum digital clock rates, regardless of the converter sampling rate, enabling the best possible digital signal decimation and filtering. Three 16-bit parallel output ports accommodate high data rate 3G applications. An on-chip interpolating half band filter can also be used to further increase the output rate while still allowing for very efficient filters. In addition, each channel has a digital AGC for output data scaling.