The ADMV8818-EP is a fully monolithic microwave integrated circuit (MMIC) that features a digitally selectable frequency of operation. The device features four independently controlled high-pass filters (HPFs) and four independently controlled low-pass filters (LPFs) that span the 2 GHz to 18 GHz frequency range.The flexible architecture of the ADMV8818-EP allows the 3 dB cutoff frequency (f3dB) of the high-pass and low-pass filters to be controlled independently to generate up to 4 GHz of bandwidth. The digital logic control on each filter is 4 bits wide (16 states) and controls the on-chip reactive elements to adjust the f3dB. The typical insertion loss is 9 dB, and the wideband rejection is 35 dB, which is ideally suited for minimizing system harmonics.This tunable filter can be used as a smaller alternative to large switched filter banks and cavity tuned filters, and this device provides a dynamically adjustable solution in advanced communications applications.APPLICATIONSTest and measurement equipment Military radar, electronic warfare, and electronic countermeasures Satellite communications and space Industrial and medical equipment

The LTC1068 product family consists of four monolithic clock-tunable filter building blocks. Each product contains four matched, low noise, high accuracy 2nd order switched-capacitor filter sections. An external clock tunes the center frequency of each 2nd order filter section. The LTC1068 products differ only in their clock-to-center frequency ratio. The clock-to-center frequency ratio is set to 200:1 (LTC1068-200), 100:1 (LTC1068), 50:1 (LTC1068-50) or 25:1 (LTC1068-25). External resistors can modify the clock-to-center frequency ratio. High performance, quad 2nd order, dual 4th order or 8th order filters can be designed with an LTC1068 family product. Designing filters with an LTC1068 product is fully supported by FilterCAD? filter design software for Windows. The LTC1068 products are available in a 28-pin SSOP surface mount package. A customized version of an LTC1068 family product can be obtained in a 16-lead SO package with internal thin-film resistors. Please contact LTC Marketing for details.Applications Lowpass or Highpass Filters: LTC1068-200, 0.5Hz to 25kHz; LTC1068, 1Hz to 50kHz; LTC1068-50, 2Hz to 50kHz; LTC1068-25, 4Hz to 200kHz Bandpass or Bandreject (Notch) Filters: LTC1068-200, 0.5Hz to 15kHz; LTC1068, 1Hz to 30kHz; LTC1068-50, 2Hz to 30kHz; LTC1068-25, 4Hz to 140kHz

DC1251A-A: Demo Board for LTC6601-1 - Low Noise, 0.5% Tolerance, 5MHz to 28MHz, Pin Configurable Filter/ADC Driver

The LTC6603 is a dual, matched, programmable lowpass filter for communications receivers and transmitters. The selectivity of the LTC6603, combined with its linear phase, phase matching and dynamic range, make it suitable for filtering in many communications systems. With 1.5? phase matching between channels, the LTC6603 can be used in applications requiring pairs of matched filters, such as transceiver I and Q channels. Furthermore, the differential inputs and outputs provide a simple interface for most communications systems.The sampled data filter does not require an external clock yet its cutoff frequency can be set with a single external resistor with an accuracy of 3.5% or better. The external resistor programs an internal oscillator whose frequency is divided prior to being applied to the filter networks. This allows up to three cutoff frequencies that can be obtained for each external resistor value, allowing the cutoff frequency to be programmed over a range of more than six octaves. Alternatively, the cutoff frequency can be set with an external clock. The filter gain can also be programmed to 1, 2, 4 or 16.The LTC6603 features a low power shutdown mode that can be programmed through the serial interface and is available in a 24-pin 4mm ? 4mm QFN package.Applications Small/Low Cost Basestations:? IDEN, PHS, TD-SCDMA, CDMA2000, WCDMA, UMTS Low Cost Repeaters, Radio Links, and Modems 802.11x Receivers JTRS

The HMC900LP5E is a 6th order, programmable bandwidth, fully calibrated, dual low pass filter. It features 0 or 10 dB input gain setting and supports arbitrary bandwidths from 3.5 to 50 MHz, and when calibrated, is accurate to ?2.5% of the desired bandwidth. It includes a filter bypass option with a bandwidth of 100 MHz, while retaining gain and common mode settings.Housed in a compact 5x5mm SMT QFN package, the HMC900LP5E requires minimal external components and provides a low cost alternative to more complicated switched discrete filter architectures. Filter calibration for the HMC900LP5E is accomplished with any reference clock rate from 20 to 80 MHz. One time programmable (OTP) memory offers unsurpassed flexibility allowing the user 'set and forget' parameters like gain, and bandwidth setting.Matched filter paths provide excellent quadrature balance, making the HMC900LP5E ideal for I/Q communications applications. The 6th order Butterworth transfer function delivers superior stop band rejection while maintaining both a flat passband and minimal group delay variation.Applications Baseband Filtering for A/D or?D/A Converters? Point-to-Point, Fixed Wireless &?Cellular Base Station Transceivers Integrated Direct Conversion Receiver (DCR)? Software Defined Radio Applications Test & Measurement Equipment

DC962A-A: Demo Board for LT6600-2.5 Very Low Noise, Differential Amplifier and 2.5MHz Lowpass Filter.

The ADuC834 is a complete smart transducer front end,integrating two high resolution - ADCs, an 8-bit MCU, andprogram/data Flash/EE memory on a single chip.The two independent ADCs (primary and auxiliary) include atemperature sensor and a PGA (allowing direct measurement oflow level signals). The ADCs with on-chip digital filtering andprogrammable output data rates are intended for the measurementof wide dynamic range, low frequency signals, such as those inweigh scale, strain-gage, pressure transducer, or temperaturemeasurement applications.The device operates from a 32 kHz crystal with an on-chip PLLgenerating a high frequency clock of 12.58 MHz. This clock isrouted through a programmable clock divider from which the MCUcore clock operating frequency is generated. The microcontrollercore is an 8052 and therefore 8051 instruction set compatiblewith 12 core clock periods per machine cycle.62 Kbytes of nonvolatile Flash/EE program memory, 4 Kbytes ofnonvolatile Flash/EE data memory, and 2304 bytes of data RAMare provided on-chip. The program memory can be configuredas data memory to give up to 60 Kbytes of NV data memory indata logging applications.On-chip factory firmware supports in-circuit serial download anddebug modes (via UART), as well as single-pin emulation modevia the EA pin. The ADuC834 is supported by a QuickStart?development system featuring low cost software and hardwaredevelopment tools.Applications Intelligent sensors Weigh scales Portable instrumentation, battery-powered systems 4?20 mA transmitters Data logging Precision system monitoring

The ADV8005 is a multiple input video signal processor that can deinterlace and scale standard definition (SD), enhanced definition (ED), or high definition (HD) video data to ultra HD formats; generate a bitmap on-screen display (OSD); and output the video with OSD overlaid on two High-Definition Multimedia Interface (HDMI?) transmitters and a video encoder.The 60-bit TTL video port can be used to input video to the ADV8005 in a number of ways: using the 48-bit TTL pixel port, using the 24-bit external OSD TTL pixel port, or from a device with an HDMI transmitter such as the ADV7850. The ADV8005 supports many of the formats outlined in the CEA-861-F and VESA specifications, as well as several other widely used timing formats.The ADV8005 features primary and secondary video scalers that enable simultaneous output of multiple different resolutions. The primary video scaler can upscale to 4k ? 2k modes. The secondary video scaler can upscale to 1080p or UXGA graphics. 4k ? 2k downscaling is performed using the secondary video scaler, leaving the primary video scaler available for other video processing.The ADV8005 primary video scaler can perform high performance, motion adaptive interlaced to progressive conversion on SD and HD content. Additional functionality has also been added to ADV8005 to facilitate upscaling and downscaling to VESA formats with pixel clock frequencies below 300 MHz.Detail enhancement and image enhancing techniques such as random, mosquito, and block noise reduction allow improved final image quality. The frame rate converter of the ADV8005 allows the conversion between common frame rates with support to output two different frame rates simultaneously under certain conditions. The VSP can do aspect ratio conversion, CUE correction, crop output image.The ADV8005 can accept OSD video from an external OSD source on one of its inputs and it can internally generate a high quality, bitmap-based OSD. The internal OSD is highly flexible and allows the system designer to easily incorporate features like scrolling text and animation in various color depths up to 24-bit true color with alpha blending, such as RGB565, ARGB4444 and ARGB8888.Analog Devices, Inc., provides an OSD development tool (Blimp) to assist in the design, debug, and emulation of the OSD prior to integration with the system application. When the design is complete, the OSD development tool automatically generates code to which system application programming interfaces (APIs) can be added before integration with the system application and an OSD design resource, which must be downloaded to an external SPI flash memory.Video can be output from the ADV8005 using one or both of the HDMI transmitters and/or the six-DAC SD/HD video encoder. The six 12-bit NSV? video DACs allow composite (CVBS), S-Video (Y/C), and component (YPrPb) analog outputs in standard, enhanced, and high definition video formats. Oversampling of 216 MHz (SD and ED) and 297 MHz (HD) removes the requirement for external output filtering. Rovi? and non-Rovi variants of the ADV8005 are available.Both of the HDMI transmitters on the ADV8005 support 4k ? 2k and all mandatory and many optional 3D video resolutions. Each transmitter features an audio return channel receiver (ARC). The ADV8005 can receive up to eight channels of I2S, S/PDIF, direct stream digital (DSD), and high bit rate (HBR) audio passed from either the serial video Rx or from the externally available audio input pins.The ADV8005 supports the I2C protocol for communication with the system microcontroller. APPLICATIONS High end A/V receivers Upconverting DVD players/recorders Video conferencing and distribution HDMI splitters Video walls 4k HDMI transmitter

The SSM2375 is a fully integrated, high efficiency, Class-D audioamplifier. It is designed to maximize performance for mobilephone applications. The application circuit requires a minimumof external components and operates from a single 2.5 V to 5.5 Vsupply. It is capable of delivering 3 W of continuous output powerwith 100 dB.Spread-spectrum pulse density modulation (PDM) is used toprovide lower EMI-radiated emissions compared with otherClass-D architectures. The inherent randomized nature ofspread-spectrum PDM eliminates the clock intermodulation(beating effect) of several amplifiers in close proximity.The SSM2375 includes an optional modulation select pin(ultralow EMI emissions mode) that significantly reduces theradiated emissions at the Class-D outputs, particularly above100 MHz. In ultralow EMI emissions mode, the SSM2375can pass FCC Class B radiated emission testing with 50 cm,unshielded speaker cable without any external filtering.The device also includes a highly flexible gain select pin thatallows the user to select a gain of 0 dB, 3 dB, 6 dB, 9 dB, or12 dB. The gain selection feature improves gain matchingbetween multiple SSM2375 devices within a single applicationas compared to using external resistors to set the gain.The SSM2375 has a micropower shutdown mode with a typicalshutdown current of 20 nA. Shutdown is enabled by applyinga logic low to the SD pin.The device also includes pop-and-click suppression circuitry.This suppression circuitry minimizes voltage glitches at theoutput during turn-on and turn-off, reducing audible noiseon activation and deactivation.Other features that simplify system-level integration of theSSM2375 include input low-pass filtering to suppress out-of-bandDAC noise interference to the PDM modulator and fixed-inputimpedance to simplify component selection across multipleplatform production builds.The SSM2375 is specified over the industrial temperature rangeof ?40?C to +85?C. It has built-in thermal shutdown and outputshort-circuit protection. It is available in a halide-free, 9-ball,1.5 mm ? 1.5 mm wafer level chip scale package (WLCSP).Applications Mobile phones MP3 players Portable electronics

The EV-SOMCRR-EZKIT carrier board enables users to plug-n-play with any of ADI’s System-on-Module (SoM) boards (e.g., EV-21569-SOM). It allows users to evaluate the most common peripherals and interfaces featured on ADI’s SHARC+ audio processors (e.g., Audio, Ethernet, MLB, USB, CAN, etc.) and features an on-board ICE emulator to provide additional cost savings by eliminating the need for an external emulator. Finally, the EV-SOMCRR-EZKIT carrier board also provides a connection to external A2B boards to allow for easy application expandability of customers’ systems. The EV-SOMCRR-EZKIT carrier board can be purchased individually or as part of an EZ-KIT evaluation system bundle (e.g., EV-21569-EZKIT) When attached to a supported SOM board, the EV-SOMCRR-EZKIT carrier board utilizes the CrossCore® Embedded Studio (CCES) development tools to enable developers to achieve faster time to market. The development environment aids advanced application code development and debug, such as: Create, compile, assemble, and link application programs written in C++, C, and assembly Load, run, step, halt, and set breakpoints in application programs Read and write data and program memory Read and write core and peripheral registers