The DS28C36 is a DeepCover® secure authenticator that provides a core set of cryptographic tools derived from integrated asymmetric (ECC-P256) and symmetric (SHA-256) security functions. In addition to the security services provided by the hardware implemented crypto engines, the device integrates a FIPS/NIST true random number generator (RNG), 8Kb of secured EEPROM, a decrement-only counter, two pins of configurable GPIO, and a unique 64-bit ROM identification number (ROM ID).The ECC public/private key capabilities operate from the NIST defined P-256 curve and include FIPS 186 compliant ECDSA signature generation and verification to support a bidirectional asymmetric key authentication model. The SHA-256 secret-key capabilities are compliant with FIPS 180 and are flexibly used either in conjunction with ECDSA operations or independently for multipleHMAC functions.Two GPIO pins can be independently operated under command control and include configurability supporting authenticated and nonauthenticated operation including an ECDSA-based crypto-robust mode to support secure-boot of a host processor.DeepCover embedded security solutions cloak sensitive data under multiple layers of advanced security to provide the most secure key storage possible. To protect against device-level security attacks, invasive and noninvasive countermeasures are implemented including active die shield, encrypted storage of keys, and algorithmic methods.Explore security topics and test drive secure authenticators with the Maxim Security Lab Secure Boot and Secure Download - Part 1: Protecting IoT Devices with Secure Authentication Secure Boot and Secure Download - Part 3: Using the DS28C36 Secure Boot and Secure Download - Part 2: Technologies Behind Embedded Security ApplicationsAccessory and Peripheral Secure AuthenticationIoT Node Crypto-ProtectionSecure Boot or Download of Firmware and/or System ParametersSecure Storage of Cryptographic Keys for a Host Controller

The DS28E36 is a DeepCover® secure authenticator that provides a core set of cryptographic tools derived from integrated asymmetric (ECC-P256) and symmetric (SHA-256) security functions. In addition to the security services provided by the hardware implemented crypto engines, the device integrates a FIPS/NIST true random number generator (RNG), 8Kb of secured EEPROM, a decrement-only counter, two pins of configurable GPIO, and a unique 64-bit ROM identification number (ROM ID). This unique ROM ID is used as a fundamental input parameter for cryptographic operations and also serves as an electronic serial number within the application. The DS28E36 communicates over the single-contact 1-Wire® bus at overdrive speed. The communication follows the 1-Wire protocol with the ROM ID acting as node address in the case of a multidevice 1-Wire network.The ECC public/private key capabilities operate from the NIST defined P-256 curve and include FIPS 186 compliant ECDSA signature generation and verification to support a bidirectional asymmetric key authentication model. The SHA-256 secret-key capabilities are compliant with FIPS 180 and are flexibly used either in conjunction with ECDSA operations or independently for multiple HMAC functions.Two GPIO pins can be independently operated under command control and include configurability supporting authenticated and nonauthenticated operation including an ECDSA-based crypto-robust mode to support secure-boot of a host processor.DeepCover embedded security solutions cloak sensitive data under multiple layers of advanced security to provide the most secure key storage possible. To protect against device-level security attacks, invasive and noninvasive countermeasures are implemented including active die shield, encrypted storage of keys, and algorithmic methods. Secure Boot and Secure Download - Part 1: Protecting IoT Devices with Secure Authentication Secure Boot and Secure Download - Part 3: Using the DS28C36 Secure Boot and Secure Download - Part 2: Technologies Behind Embedded Security ApplicationsAccessory and Peripheral Secure AuthenticationIoT Node Crypto-ProtectionSecure Boot or Download of Firmware and/or System ParametersSecure Storage of Cryptographic Keys for a Host Controller

The DS28E38 is an ECDSA public key-based secure authenticator that incorporates Maxim’s patented ChipDNA™ PUF technology. ChipDNA technology involves a physically unclonable function (PUF) that enables the DS28E38 to deliver cost-effective protection against invasive physical attacks. Using the random variation of semiconductor device characteristics that naturally occur during wafer fabrication, the ChipDNA circuit generates a unique output value that is repeatable over time, temperature, and operating voltage. Attempts to probe or observe ChipDNA operation modifies the underlying circuit characteristics, preventing discovery of the unique value used by the chip cryptographic functions. The DS28E38 utilizes the ChipDNA output as key content to cryptographically secure all device stored data and optionally, under user control, as the private key for the ECDSA signing operation. With ChipDNA capability, the device provides a core set of cryptographic tools derived from integrated blocks including an asymmetric (ECC-P256) hardware engine, a FIPS/NIST-compliant true random number generator (TRNG), 2Kb of secured EEPROM, a decrement-only counter and a unique 64-bit ROM identification number (ROM ID). The ECC public/ private key capabilities operate from the NIST-defined P-256 curve to provide a FIPS 186-compliant ECDSA signature generation function. The unique ROM ID is used as a fundamental input parameter for cryptographic operations and serves as an electronic serial number within the application. The DS28E38 communicates over the single-contact 1-Wire® bus at both standard and overdrive speeds. The communication follows the 1-Wire protocol with the ROM ID acting as node address in the case of a multidevice 1-Wire network.Sample now!Explore security topics and test drive secure authenticators with the Maxim Security LabRead white paper › Read white paper ›How to Setup the DS28E38 Evaluation Kit and Perform ECDSA Authentication ChipDNA–Defend Your IoT Designs from HackersAlso see: ChipDNA Technology ›ApplicationsAuthentication of Medical Sensors and ToolsIoT Node AuthenticationPeripheral AuthenticationPrinter Cartridge Identification and AuthenticationReference Design License ManagementSecure Management of Limited Use Consumables

The MAX4987AE are overvoltage protection devices with built-in ESD protection for USB data lines. These devices feature a low 100mΩ (typ) RON internal nFET switch and protect low-voltage systems against voltage faults up to +28V. When the input voltage exceeds the overvoltage threshold or decreases below the under-voltage threshold, the internal nFET switch is turned off to prevent damage to the protected components.All switches feature a minimum 1.5A current-limit protection. During a short-circuit occurrence, the switch operates in an autoretry mode where the internal nFET switch is turned on to check if the fault has been removed. The autoretry interval is 30ms, and if the fault is removed, the nFET switch remains on.The MAX4987AE feature low-capacitance (3pF) ESD protection for USB data lines that allow transmission of high-speed USB 2.0 signals.The overvoltage threshold (OVLO) is preset to 6.15V. The undervoltage thresholds (UVLO) are preset to 2.55V (MAX4987AE). When the input voltage drops below the undervoltage (UVLO) threshold, the devices enter a low-current standby mode.All devices are offered in a small 2mm x 3mm, 8-pin TDFN package and operate over the -40°C to +85°C extended temperature range.ApplicationsCell PhonesMedia Players

The MAX7306/MAX7307 I²C-/SMBus™-compatible, serial-interfaced peripherals feature four level-translating I/Os and operate from a 1.62V to 3.6V power supply. The MAX7307 features a port supply (VLA) that allows level translation on I/O ports to operate from a separate power supply from 1.4V to 5.5V. The MAX7306 features an address select input (AD0) to allow up to four unique slave addresses.The MAX7306/MAX7307 ports P2, P3, and P4 can be configured as inputs, push-pull outputs, and open-drain outputs. Port P1 can be configured as a general-purpose input, open-drain output, or an open-drain active-low INT output. Ports P2 and P3 can be configured as OSCIN and OSCOUT, respectively. The MAX7306/MAX7307 include an internal oscillator for PWM, blink, and key debounce, or to cascade multiple MAX7306/MAX7307s. The external clock can be used to set a specific PWM and blink timing. The active-low RST input asynchronously clears the 2-wire interface and terminates a bus lockup involving the MAX7306/MAX7307.All ports configured as output feature 33-step PWM, allowing any output to be set from fully off, 1/32 to 31/32 duty cycle, to fully on. All output ports also feature LED blink control, allowing blink periods of 1/8 second, 1/4 second, 1/2 second, 1, 2, 4, or 8 seconds. Any port can blink during this period with a 1/16 to 15/16 duty cycle.The MAX7306/MAX7307 are specified over the -40°C to +125°C temperature range and are available in 10-pin µDFN (2mm x 2mm) and 10-pin µMAX® packages.ApplicationsCell PhonesLCD/Keypad BacklightsLED Status IndicatorsSystem I/O Ports

The MAX7325 2-wire serial-interfaced peripheral features 16 I/O ports. Ports are divided into eight push-pull outputs and eight I/Os with selectable internal pullups and transition detection. Eight ports are push-pull outputs and eight I/Os may be used as a logic input or an open-drain output. Ports are overvoltage protected to +6V.All I/O ports configured as inputs are continuously monitored for state changes (transition detection). State changes are indicated by the active-low INT output. The interrupt is latched, allowing detection of transient changes. When the MAX7325 is subsequently accessed through the serial interface, any pending interrupt is cleared. The open-drain outputs are rated to sink 20mA, and are capable of driving LEDs. The active-low RST input clears the serial interface, terminating any I2C communication to or from the MAX7325.The MAX7325 uses two address inputs with four-level logic to allow 16 I2C slave addresses. The slave address also determines the power-up logic state for the I/O ports, and enables or disables internal 40kΩ pullups in groups of four ports.The MAX7325 is one device in a family of pin-compatible port expanders with a choice of input ports, open-drain I/O ports, and push-pull output ports (see Table 1 of the full data sheet).The MAX7325 is available in 24-pin QSOP and TQFN packages and is specified over the -40°C to +125°C automotive temperature range.ApplicationsAutomotiveCell PhonesNotebooksSAN/NASSatellite RadioServers

The MAX9247 digital video parallel-to-serial converter serializes 27 bits of parallel data into a serial-data stream. Eighteen bits of video data and 9 bits of control data are encoded and multiplexed onto the serial interface, reducing the serial-data rate. The data-enable input determines when the video or control data is serialized.The MAX9247 pairs with the MAX9248/MAX9250 deserializers to form a complete digital video serial link. Interconnect can be controlled-impedance PCB traces or twisted-pair cable. Proprietary data encoding reduces EMI and provides DC balance. DC balance allows AC-coupling, providing isolation between the transmitting and receiving ends of the interface. The LVDS output is internally terminated with 100Ω. For operating frequencies less than 35MHz, the MAX9247 can also pair with the MAX9218 deserializer.ESD tolerance is specified for ISO 10605 with ±10kV Contact Discharge and ±30kV Air-Gap Discharge.The MAX9247 operates from a +3.3V core supply and features a separate input supply for interfacing to 1.8V to 3.3V logic levels. This device is available in a 48-lead LQFP package and is specified from -40°C to +85°C or -40°C to +105°C.ApplicationsIn-Vehicle Entertainment SystemsLCDsNavigation System DisplaysVideo Cameras

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