Up-Down Converters Multi-band converter with LO+IF amp

Digital Potentiometer ICs Digital Sextet Potentiometer

Digital Potentiometer ICs Extremely Acc SPI Bus RTC

Digital Potentiometer ICs Dual Audio Taper Potentiometer with Pushbutton Control

The LTC1068 product family consists of four monolithic clock-tunable filter building blocks. Each product contains four matched, low noise, high accuracy 2nd order switched-capacitor filter sections. An external clock tunes the center frequency of each 2nd order filter section. The LTC1068 products differ only in their clock-to-center frequency ratio. The clock-to-center frequency ratio is set to 200:1 (LTC1068-200), 100:1 (LTC1068), 50:1 (LTC1068-50) or 25:1 (LTC1068-25). External resistors can modify the clock-to-center frequency ratio. High performance, quad 2nd order, dual 4th order or 8th order filters can be designed with an LTC1068 family product. Designing filters with an LTC1068 product is fully supported by FilterCAD? filter design software for Windows. The LTC1068 products are available in a 28-pin SSOP surface mount package. A customized version of an LTC1068 family product can be obtained in a 16-lead SO package with internal thin-film resistors. Please contact LTC Marketing for details.Applications Lowpass or Highpass Filters: LTC1068-200, 0.5Hz to 25kHz; LTC1068, 1Hz to 50kHz; LTC1068-50, 2Hz to 50kHz; LTC1068-25, 4Hz to 200kHz Bandpass or Bandreject (Notch) Filters: LTC1068-200, 0.5Hz to 15kHz; LTC1068, 1Hz to 30kHz; LTC1068-50, 2Hz to 30kHz; LTC1068-25, 4Hz to 140kHz

DC1251A-A: Demo Board for LTC6601-1 - Low Noise, 0.5% Tolerance, 5MHz to 28MHz, Pin Configurable Filter/ADC Driver

The LTC6603 is a dual, matched, programmable lowpass filter for communications receivers and transmitters. The selectivity of the LTC6603, combined with its linear phase, phase matching and dynamic range, make it suitable for filtering in many communications systems. With 1.5? phase matching between channels, the LTC6603 can be used in applications requiring pairs of matched filters, such as transceiver I and Q channels. Furthermore, the differential inputs and outputs provide a simple interface for most communications systems.The sampled data filter does not require an external clock yet its cutoff frequency can be set with a single external resistor with an accuracy of 3.5% or better. The external resistor programs an internal oscillator whose frequency is divided prior to being applied to the filter networks. This allows up to three cutoff frequencies that can be obtained for each external resistor value, allowing the cutoff frequency to be programmed over a range of more than six octaves. Alternatively, the cutoff frequency can be set with an external clock. The filter gain can also be programmed to 1, 2, 4 or 16.The LTC6603 features a low power shutdown mode that can be programmed through the serial interface and is available in a 24-pin 4mm ? 4mm QFN package.Applications Small/Low Cost Basestations:? IDEN, PHS, TD-SCDMA, CDMA2000, WCDMA, UMTS Low Cost Repeaters, Radio Links, and Modems 802.11x Receivers JTRS

The HMC900LP5E is a 6th order, programmable bandwidth, fully calibrated, dual low pass filter. It features 0 or 10 dB input gain setting and supports arbitrary bandwidths from 3.5 to 50 MHz, and when calibrated, is accurate to ?2.5% of the desired bandwidth. It includes a filter bypass option with a bandwidth of 100 MHz, while retaining gain and common mode settings.Housed in a compact 5x5mm SMT QFN package, the HMC900LP5E requires minimal external components and provides a low cost alternative to more complicated switched discrete filter architectures. Filter calibration for the HMC900LP5E is accomplished with any reference clock rate from 20 to 80 MHz. One time programmable (OTP) memory offers unsurpassed flexibility allowing the user 'set and forget' parameters like gain, and bandwidth setting.Matched filter paths provide excellent quadrature balance, making the HMC900LP5E ideal for I/Q communications applications. The 6th order Butterworth transfer function delivers superior stop band rejection while maintaining both a flat passband and minimal group delay variation.Applications Baseband Filtering for A/D or?D/A Converters? Point-to-Point, Fixed Wireless &?Cellular Base Station Transceivers Integrated Direct Conversion Receiver (DCR)? Software Defined Radio Applications Test & Measurement Equipment

The ADMV8818-EP is a fully monolithic microwave integrated circuit (MMIC) that features a digitally selectable frequency of operation. The device features four independently controlled high-pass filters (HPFs) and four independently controlled low-pass filters (LPFs) that span the 2 GHz to 18 GHz frequency range.The flexible architecture of the ADMV8818-EP allows the 3 dB cutoff frequency (f3dB) of the high-pass and low-pass filters to be controlled independently to generate up to 4 GHz of bandwidth. The digital logic control on each filter is 4 bits wide (16 states) and controls the on-chip reactive elements to adjust the f3dB. The typical insertion loss is 9 dB, and the wideband rejection is 35 dB, which is ideally suited for minimizing system harmonics.This tunable filter can be used as a smaller alternative to large switched filter banks and cavity tuned filters, and this device provides a dynamically adjustable solution in advanced communications applications.APPLICATIONSTest and measurement equipment Military radar, electronic warfare, and electronic countermeasures Satellite communications and space Industrial and medical equipment

The ADAU1361 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 14 mW from a 1.8 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The ADAU1361 is ideal for battery-powered audio and telephony applications.The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1361 includes a stereo digital microphone input.The ADAU1361 includes five high power output drivers (two differential and three single-ended), supporting stereo headphones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz.Applications Smartphones/Multimedia phones Digital Still Cameras/Digital Video Cameras Portable Media Players/Portable Audio Players Phone accessories products