The ADMV8818-EP is a fully monolithic microwave integrated circuit (MMIC) that features a digitally selectable frequency of operation. The device features four independently controlled high-pass filters (HPFs) and four independently controlled low-pass filters (LPFs) that span the 2 GHz to 18 GHz frequency range.The flexible architecture of the ADMV8818-EP allows the 3 dB cutoff frequency (f3dB) of the high-pass and low-pass filters to be controlled independently to generate up to 4 GHz of bandwidth. The digital logic control on each filter is 4 bits wide (16 states) and controls the on-chip reactive elements to adjust the f3dB. The typical insertion loss is 9 dB, and the wideband rejection is 35 dB, which is ideally suited for minimizing system harmonics.This tunable filter can be used as a smaller alternative to large switched filter banks and cavity tuned filters, and this device provides a dynamically adjustable solution in advanced communications applications.APPLICATIONSTest and measurement equipment Military radar, electronic warfare, and electronic countermeasures Satellite communications and space Industrial and medical equipment

The LTC1068 product family consists of four monolithic clock-tunable filter building blocks. Each product contains four matched, low noise, high accuracy 2nd order switched-capacitor filter sections. An external clock tunes the center frequency of each 2nd order filter section. The LTC1068 products differ only in their clock-to-center frequency ratio. The clock-to-center frequency ratio is set to 200:1 (LTC1068-200), 100:1 (LTC1068), 50:1 (LTC1068-50) or 25:1 (LTC1068-25). External resistors can modify the clock-to-center frequency ratio. High performance, quad 2nd order, dual 4th order or 8th order filters can be designed with an LTC1068 family product. Designing filters with an LTC1068 product is fully supported by FilterCAD? filter design software for Windows. The LTC1068 products are available in a 28-pin SSOP surface mount package. A customized version of an LTC1068 family product can be obtained in a 16-lead SO package with internal thin-film resistors. Please contact LTC Marketing for details.Applications Lowpass or Highpass Filters: LTC1068-200, 0.5Hz to 25kHz; LTC1068, 1Hz to 50kHz; LTC1068-50, 2Hz to 50kHz; LTC1068-25, 4Hz to 200kHz Bandpass or Bandreject (Notch) Filters: LTC1068-200, 0.5Hz to 15kHz; LTC1068, 1Hz to 30kHz; LTC1068-50, 2Hz to 30kHz; LTC1068-25, 4Hz to 140kHz

The ADAU1361 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 14 mW from a 1.8 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The ADAU1361 is ideal for battery-powered audio and telephony applications.The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1361 includes a stereo digital microphone input.The ADAU1361 includes five high power output drivers (two differential and three single-ended), supporting stereo headphones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz.Applications Smartphones/Multimedia phones Digital Still Cameras/Digital Video Cameras Portable Media Players/Portable Audio Players Phone accessories products

The ADAU1442?/ ADAU1445?/ ADAU1446 are enhanced audio processors that allow full flexibility in routing all input and output signals. The SigmaDSP? core features full 28-bit processing (56-bit in double-precision mode), synchronous parameter loading for ensuring filter stability, and 100% code efficiency with the SigmaStudio? tools. This DSP allows system designers to compensate for the real-world limitations of speakers, amplifiers, and listening environments, resulting in a dramatic improvement of the perceived audio quality through speaker equalization, multiband compression, limiting, and third-party branded algorithms.The flexible audio routing matrix (FARM) allows the user to multiplex inputs from multiple sources running at various sample rates to or from the SigmaDSP core. This drastically reduces the complexity of signal routing and clocking issues in the audio system. FARM includes up to eight stereo asynchronous sample rate converters (depending on the device model), Sony/Philips Digital Interconnect Format (S/PDIF) input and output, and serial (I2S) and time division multiplexing (TDM) I/Os. Any of these inputs can be routed to the SigmaDSP core or to any of the asynchronous sample rate converters (ASRCs). Similarly, any one of the output signals can be taken from the SigmaDSP core or from any of the ASRC outputs. This routing scheme, which can be modified at any time via control registers, allows for maximum system flexibility.The ADAU1442, ADAU1445, and ADAU1446 differ only in ASRC functionality and packaging. The ADAU1442 / ADAU1445 contain 16 channels of ASRCs and are packaged in TQFP packages, whereas the ADAU1446 contains no ASRCs and is packaged in an LQFP. The ADAU1442 can handle nine clock domains, the ADAU1445 can handle three clock domains, and the ADAU1446 can handle one clock domain.The ADAU1442 / ADAU1445 / ADAU1446 can be controlled in one of two operational modes: the settings of the chip can be loaded and dynamically updated through the SPI/I2C? port, or the DSP can self-boot from an external EEPROM in a system with no microcontroller. There is also a bank of multipurpose (MP) pins that can be used as general-purpose digital I/Os or as inputs to the 4-channel auxiliary control ADC.The ADAU1442 / ADAU1445 / ADAU1446 are supported by the SigmaStudio graphical development environment. This software includes audio processing blocks such as FIR and IIR filters, dynamics processors, mixers, low level DSP functions, and third-party algorithms for fast development of custom signal flows.APPLICATIONS Automotive audio processing Head units Navigation systems Rear-seat entertainment systems DSP amplifiers (sound system amplifiers) Commercial audio processing

The ADAU1787 is a codec with four inputs and two outputs that incorporates two digital signal processors (DSPs). The path from the analog input to the DSP core to the analog output is optimized for low latency and is ideal for noise cancelling headsets. With the addition of just a few passive components, the ADAU1787 provides a complete headset solution.Note that throughout the data sheet, multifunction pins, such as BCLK_0/MP1, are referred to either by the entire pin name or by a single function of the pin, for example, BCLK_0, when only that function is relevant.Applications Noise cancelling handsets, headsets, and headphones Bluetooth ANC handsets, headsets, and headphones Personal navigation devices Digital still and video cameras Musical instrument effect processors Multimedia speaker systems Smartphones

The ADAU1966 is a high performance, single-chip DAC thatprovides 16 digital-to-analog converters (DACs) with differentialoutput using the Analog Devices, Inc., patented multibitsigma-delta (?-?) architecture. An SPI/I2C port is included,allowing a microcontroller to adjust volume and many otherparameters. The ADAU1966 operates from 2.5 V digital, 5 Vanalog and 3.3 V or 5 V input/output supplies. A linear regulatoris included to generate the digital supply voltage from the analogsupply voltage. The ADAU1966 is available in an 80-lead LQFPpackage.The ADAU1966 is designed for low EMI. This consideration isapparent in both the system and circuit design architectures.By using the on-board PLL to derive the internal master clockfrom an external LRCLK, the ADAU1966 can eliminate theneed for a separate high frequency master clock and can beused with or without a bit clock. The DACs are designed usingthe latest Analog Devices continuous time architectures tofurther minimize EMI. By using 2.5 V digital supplies, powerconsumption is minimized, and the digital waveforms are asmaller amplitude, further reducing emissions. Applications Automotive audio systems Home theater systems Digital audio effects processors

The ADAU1979 incorporates four high performance, analog-to-digital converters (ADCs) with 4.5 V rms capable ac-coupled inputs. The ADCs use a multibit sigma-delta (?-?) architecture with continuous time front end for low EMI. An I2C/serial peripheral interface (SPI) control port is included that allows a microcontroller to adjust volume and many other parameters. The ADAU1979 uses only a single 3.3 V supply. The device internally generates the required digital DVDD supply. The low power architecture reduces the power consumption. The on-chip PLL can derive the master clock from an external clock input or frame clock (sample rate clock). When fed with the frame clock, it eliminates the need for a separate high frequency master clock in the system. The ADAU1979 is available in a 40-lead LFCSP package.Note that throughout the data sheet, multifunction pins, such as SCL/CCLK, are referred to either by the entire pin name or by a single function of the pin, for example, CCLK, when only that function is relevant.APPLICATIONS Automotive audio systems Active noise cancellation systems

The ADuC834 is a complete smart transducer front end,integrating two high resolution - ADCs, an 8-bit MCU, andprogram/data Flash/EE memory on a single chip.The two independent ADCs (primary and auxiliary) include atemperature sensor and a PGA (allowing direct measurement oflow level signals). The ADCs with on-chip digital filtering andprogrammable output data rates are intended for the measurementof wide dynamic range, low frequency signals, such as those inweigh scale, strain-gage, pressure transducer, or temperaturemeasurement applications.The device operates from a 32 kHz crystal with an on-chip PLLgenerating a high frequency clock of 12.58 MHz. This clock isrouted through a programmable clock divider from which the MCUcore clock operating frequency is generated. The microcontrollercore is an 8052 and therefore 8051 instruction set compatiblewith 12 core clock periods per machine cycle.62 Kbytes of nonvolatile Flash/EE program memory, 4 Kbytes ofnonvolatile Flash/EE data memory, and 2304 bytes of data RAMare provided on-chip. The program memory can be configuredas data memory to give up to 60 Kbytes of NV data memory indata logging applications.On-chip factory firmware supports in-circuit serial download anddebug modes (via UART), as well as single-pin emulation modevia the EA pin. The ADuC834 is supported by a QuickStart?development system featuring low cost software and hardwaredevelopment tools.Applications Intelligent sensors Weigh scales Portable instrumentation, battery-powered systems 4?20 mA transmitters Data logging Precision system monitoring

The ADV7619 is a high quality, two input, one output (2:1) multiplexed High-Definition Multimedia Interface (HDMI?) receiver. The ADV7619 is offered in professional (no HDCP keys) and commercial versions. The operating temperature range is 0?C to 70?C.The ADV7619 incorporates a dual input HDMI-capable receiver that supports all mandatory 3D TV formats defined in the HDMI 1.4a specification, HDTV formats up to 1080p 36-bit Deep Color/2160p 8-bit, and display resolutions up to 4k ? 2k (3840 ? 2160 at 30 Hz). It integrates an HDMI CEC controller that supports the capability discovery and control (CDC) feature.The ADV7619 incorporates Xpressview? fast switching on both input HDMI ports. Using the Analog Devices, Inc., hardware-based HDCP engine to minimize software overhead, Xpressview technology allows fast switching between both HDMI input ports in less than 1 sec.Each HDMI port has dedicated 5 V detect and Hot Plug? assert pins. The HDMI receiver also includes an integrated programmable equalizer that ensures robust operation of the interface with long cables.The ADV7619 offers a flexible audio output port for audio data extraction from the HDMI stream. HDMI audio formats, including SACD via DSD and HBR, are supported by the ADV7619.The HDMI receiver has advanced audio functionality, such as a mute controller, that prevents audible extraneous noise in the audio output.The ADV7619 contains one main component processor (CP), which processes video signals from the HDMI receiver up to 1080p 36-bit Deep Color. It provides features such as contrast, brightness and saturation adjustments, STDI detection block, free-run, and synchronization alignment controls.For video formats with pixel clocks higher than 170 MHz, the video signals received on the HDMI receiver are output directly to the pixel port output. To accommodate the higher bandwidth required for these higher resolutions, the output on the pixel bus consists of two 24-bit buses running at up to 150 MHz: one bus contains the even pixels, and the other bus contains the odd pixels. When these two buses are combined, they allow the transfer of video data with pixel clocks up to 300 MHz. In this mode, both 4:4:4 RGB 8-bit and 4:2:2 12-bit are supported.Fabricated in an advanced CMOS process, the ADV7619 is provided in a 14 mm ? 14 mm, 128-lead, surface-mount, RoHS-compliant TQFP_EP package and is specified over the 0?C to 70?C temperature range. APPLICATIONSProjectorsVideo conferencingHDTVAVR, HTiBSoundbarVideo switch

The ADV8005 is a multiple input video signal processor that can deinterlace and scale standard definition (SD), enhanced definition (ED), or high definition (HD) video data to ultra HD formats; generate a bitmap on-screen display (OSD); and output the video with OSD overlaid on two High-Definition Multimedia Interface (HDMI?) transmitters and a video encoder.The 60-bit TTL video port can be used to input video to the ADV8005 in a number of ways: using the 48-bit TTL pixel port, using the 24-bit external OSD TTL pixel port, or from a device with an HDMI transmitter such as the ADV7850. The ADV8005 supports many of the formats outlined in the CEA-861-F and VESA specifications, as well as several other widely used timing formats.The ADV8005 features primary and secondary video scalers that enable simultaneous output of multiple different resolutions. The primary video scaler can upscale to 4k ? 2k modes. The secondary video scaler can upscale to 1080p or UXGA graphics. 4k ? 2k downscaling is performed using the secondary video scaler, leaving the primary video scaler available for other video processing.The ADV8005 primary video scaler can perform high performance, motion adaptive interlaced to progressive conversion on SD and HD content. Additional functionality has also been added to ADV8005 to facilitate upscaling and downscaling to VESA formats with pixel clock frequencies below 300 MHz.Detail enhancement and image enhancing techniques such as random, mosquito, and block noise reduction allow improved final image quality. The frame rate converter of the ADV8005 allows the conversion between common frame rates with support to output two different frame rates simultaneously under certain conditions. The VSP can do aspect ratio conversion, CUE correction, crop output image.The ADV8005 can accept OSD video from an external OSD source on one of its inputs and it can internally generate a high quality, bitmap-based OSD. The internal OSD is highly flexible and allows the system designer to easily incorporate features like scrolling text and animation in various color depths up to 24-bit true color with alpha blending, such as RGB565, ARGB4444 and ARGB8888.Analog Devices, Inc., provides an OSD development tool (Blimp) to assist in the design, debug, and emulation of the OSD prior to integration with the system application. When the design is complete, the OSD development tool automatically generates code to which system application programming interfaces (APIs) can be added before integration with the system application and an OSD design resource, which must be downloaded to an external SPI flash memory.Video can be output from the ADV8005 using one or both of the HDMI transmitters and/or the six-DAC SD/HD video encoder. The six 12-bit NSV? video DACs allow composite (CVBS), S-Video (Y/C), and component (YPrPb) analog outputs in standard, enhanced, and high definition video formats. Oversampling of 216 MHz (SD and ED) and 297 MHz (HD) removes the requirement for external output filtering. Rovi? and non-Rovi variants of the ADV8005 are available.Both of the HDMI transmitters on the ADV8005 support 4k ? 2k and all mandatory and many optional 3D video resolutions. Each transmitter features an audio return channel receiver (ARC). The ADV8005 can receive up to eight channels of I2S, S/PDIF, direct stream digital (DSD), and high bit rate (HBR) audio passed from either the serial video Rx or from the externally available audio input pins.The ADV8005 supports the I2C protocol for communication with the system microcontroller. APPLICATIONS High end A/V receivers Upconverting DVD players/recorders Video conferencing and distribution HDMI splitters Video walls 4k HDMI transmitter