The AD8400/AD8402/AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kOhm, 10 kOhm, 50 kOhm or 100 kOhm has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.

The AD8400/AD8402/AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kOhm, 10 kOhm, 50 kOhm or 100 kOhm has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.

The AD8400/AD8402/AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kOhm, 10 kOhm, 50 kOhm or 100 kOhm has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.

The AD8400 / AD8402 / AD8403 provide a single, dual or quad channel, 256 position digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer or variable resistor. The AD8400 contains a single variable resistor in the compact SO-8 package. The AD8402 contains two independent variable resistors in saving SO-14 surface mount package. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kΩ, 10 kΩ, 50 kΩ or 100 kΩ has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation.Each VR has its own VR latch that holds its programmed resistance value. These VR latches are updated from an SPI compatible serial-to-parallel shift register that is loaded from a standard 3-wire serial-input digital interface. Ten data bits make up the data word clocked into the serial input register. The data word is decoded where the first two bits determine the address of the VR latch to be loaded, the last eight bits are data. A serial data output pin at the opposite end of the serial register allows simple daisy-chaining in multiple VR applications without additional external decoding logic.

The AD9826 is a complete analog signal processor for imaging applications. It features a 3-channel architecture designed to sample and condition the outputs of trilinear color CCD arrays. Each channel consists of an input clamp, Correlated Double Sampler (CDS), offset DAC, and Programmable Gain Amplifier (PGA), multiplexed to a high-performance 16-bit A/D converter.APPLICATIONS Flatbed Document Scanners Digital Copier Multifunction Peripherals Infrared Imaging Applications Machine Vision

The AD9959 consists of four direct digital synthesizer (DDS)cores that provide independent frequency, phase, and amplitudecontrol on each channel. This flexibility can be used to correct imbalances between signals due to analog processing, such asfiltering, amplification, or PCB layout-related mismatches.Because all channels share a common system clock, they areinherently synchronized. Synchronization of multiple devices is supported.The AD9959 can perform up to a 16-level modulation of fre-quency, phase, or amplitude (FSK, PSK, ASK). Modulation isperformed by applying data to the profile pins. In addition, theAD9959 also supports linear sweep of frequency, phase, or amplitude for applications such as radar and instrumentation. The AD9959 serial I/O port offers multiple configurations to provide significant flexibility. The serial I/O port offers an SPI-compatible mode of operation that is virtually identical to the SPI operation found in earlier Analog Devices, Inc., DDS products. Flexibility is provided by four data pins (SDIO_0/SDIO_1/SDIO_2/SDIO_3) that allow four programmable modes of serial I/O operation.The AD9959 uses advanced DDS technology that provides low power dissipation with high performance. The device incorporates four integrated, high speed 10-bit DACs with excellent wideband and narrow-band SFDR. Each channel has a dedicated 32-bit frequency tuning word, 14 bits of phase offset, and a 10-bit output scale multiplier. The DAC outputs are supply referenced and must be terminated into AVDD by a resistor or an AVDD center-tapped transformer. Each DAC has its own programmable reference to enable different full-scale currents for each channel. The DDS acts as a high resolution frequency divider with the REFCLK as the input and the DAC providing the output. The REFCLK input source is common to all channels and can be driven directly or used in combination with an integrated REFCLK multiplier (PLL) up to a maximum of 500 MSPS. The PLL multiplication factor is programmable from 4 to 20, in integer steps. The REFCLK input also features an oscillator circuit to support an external crystal as the REFCLK source. The crystal must be between 20 MHz and 30 MHz. The crystal can be used in combination with the REFCLK multiplier.The AD9959 comes in a space-saving 56-lead LFCSP package. The DDS core (AVDD and DVDD pins) is powered by a 1.8 V supply. The digital I/O interface (SPI) operates at 3.3 V and requires DVDD_I/O (Pin 49) be connected to 3.3 V. The AD9959 operates over the industrial temperature range of −40°C to +85°C.APPLICATIONSAgile local oscillators Phased array radars/sonars Instrumentation Synchronized clocking RF source for AOTF

The ADA4430-1 is a fully integrated video reconstruction filter that combines excellent video specifications with low power consumption and an ultralow power disable, making it ideal for portable video filtering applications. With 1 dB frequency flatness out to 8 MHz and 50 dB rejection at 27 MHz, the ADA4430-1 is ideal in SD video applications including NTSC and PAL.The ADA4430-1 operates on single supplies as low as 2.5 V and as high as 6 V while providing the dynamic range required by the most demanding video systems.The ADA4430-1 also provides an on-chip dc offset to avoid clipping of the sync tips at the filter output, as well as SAG correction that permits smaller capacitor values to be used in applications with ac-coupled outputs.The ADA4430-1 is available in a 6-lead SC70 package and is rated to work in the extended automotive temperature range of -40°C to +125°C.

The ADG2128 is an analog cross point switch with an array size of 8 × 12. The switch array is arranged so that there are eight columns by 12 rows, for a total of 96 switch channels. The array is bidirectional, and the rows and columns can be configured as either inputs or outputs. Each of the 96 switches can be addressed and configured through the I2C compatible interface. Standard, full speed, and high speed (3.4 MHz) I2C interfaces are supported. Any simultaneous switch combination is allowed. An additional feature of the ADG2128 is that switches can be updated simultaneously, using the LDSW command. In addition, a RESET option allows all of the switch channels to be reset/off. At power-on, all switches are in the off condition. The device is packaged in a 32-lead, 5 mm × 5 mm LFCSP_VQ.APPLICATIONS AV switching in TV Automotive infotainment AV receivers CCTV Ultrasound applications KVM switching Telecom applications Test equipment/instrumentation PBX systems

Applications:

• Field transmitters
• HART multiplexers
• PLC and DCS analog I/O modules
• HART network connectivity

Features and Benefits:

• HART-compliant fully integrated FSK modem
• 1200 Hz and 2200 Hz sinusoidal shift frequencies
• 115 µA maximum supply current in receive mode
• Suitable for intrinsically safe applications
• Integrated receive band-pass filter
  
  • Minimal external components required
• Clocking optimized for various system configurations
  
  • Ultralow power crystal oscillator (60 µA maximum)
  • External CMOS clock source
• Buffered HART output—extra drive capability
• 8 kV HBM ESD rating
• 1.71 V to 5.5 V power supply
• 1.71 V to 5.5 V interface
• −40°C to +125°C operation
• 4 mm × 4 mm LFCSP package
• HART physical layer compliant
• UART interface

The ADATE318 is a complete, single-chip ATE solution that performs the pin electronics functions of driver, comparator, and active load (DCL), four quadrant, per pin, parametric measurement unit (PPMU). It has VHH drive capability per chip to support flash memory testing applications and integrated 16-bit DACs with an on-chip calibration engine to provide all necessary dc levels for operation of the part.The driver features three active states: data high, data low, and terminate mode, as well as a high impedance inhibit state. The inhibit state, in conjunction with the integrated dynamic clamps, facilitates the implementation of a high speed active termination. The output voltage capability is −1.5 V to +6.5 V to accommodate a wide range of ATE and instrumentation applications.The ADATE318 can be used as a dual, single-ended drive/ receive channel or as a single differential drive/receive channel. Each channel of the ADATE318 features a high speed window comparator as well as a programmable threshold differential comparator for differential ATE applications. A four quadrant PPMU is also provided per channel.All dc levels for DCL and PPMU functions are generated by 24 on-chip 16-bit DACs. To facilitate accurate levels programming, the ADATE318 contains an integrated calibration function to correct gain and offset errors for each functional block. Correction coefficients can be stored on chip, and any values written to the DACs are automatically adjusted using the appropriate correction factors.The ADATE318 uses a serial programmable interface (SPI) bus to program all functional blocks, DACs, and on-chip calibration constants. It also has an on-chip temperature sensor and over/undervoltage fault clamps for monitoring and reporting the device temperature and any output pin or PPMU voltage faults that may occur during operation.APPLICATIONS Automatic test equipment Semiconductor test systems Board test systems Instrumentation and characterization equipment