HOT SWAP CONTROLLER, 20V, LFCSP-EP-32;

High-Current, Active Bias Controller Features:Automatic gate voltage adjustment (no calibration)Supply voltage (5 V to 16.5 V)Bias enhancement or depletion mode devicesAdjustable drain current up to 1.6 ASink or source gate currentOptional internal negative voltage generationFast enable/disableTRIGOUT output for daisy chainPower-up and power-down sequencingOvercurrent/undercurrent alarm with hysteresis24-lead, 4 mm 4 mm LFCSP package: 16 mm2

The AD5560 is a high performance, highly integrated device power supply consisting of programmable force voltages and measure ranges. This part includes the required DAC levels to set the programmable inputs for the drive amplifier, as well as clamping and comparator circuitry. Offset and gain correction is included on-chip for DAC functions. A number of programmable measure current ranges are available: five internal fixed ranges and two external customer-selectable ranges (EXTFORCE1 and EXTFORCE2) that can supply currents up to ±1.2 A and ±500 mA, respectively. The voltage range possible at this high current level is limited by headroom and the maximum power dissipation. Current ranges in excess of ±1.2 A or at high current and high voltage combinations can be achieved by paralleling or ganging multiple DPS devices. Open-drain alarm outputs are provided in the event of overcurrent, overtemperature, or Kelvin alarm on either the SENSE or DUTGND line.The DPS functions are controlled via a simple 3-wire serial interface compatible with SPI, QSPI™, MICROWIRE™, and DSP interface standards running at clock speeds of up to 50 MHz.APPLICATIONS Automatic test equipment (ATE) Device power supply

OPTICAL BIOMETRIC TRANS RED & INFRARED / REEL7

4 Channel Digital Isolator 1kV

IC ROBUST QUAD ISO 3:1 CH

A2B Main/Subordinate 4xPDM XCVR w I2S/TDM Features:A2B BUS FEATURES Line topology Single main node, multiple subordinate nodes Up to 15 m between nodes and up to 40 m overall cable length Communication over distance Synchronous data Multichannel I2S/TDM to I2S/TDM Synchronous clock, phase aligned in all nodes Low latency node to node communication Control and status information I2C to I2C GPIO and interrupt Bus power or local power subordinate nodes Configurable with SigmaStudio/SigmaStudio+ graphical software tool AEC-Q100 qualified for automotive applicationsA2B TRANSCEIVER FEATURES Configurable A2B bus main node or subordinate node Programmable via I2C interface 8-bit to 32-bit multichannel I2S/TDM interface Programmable I2S/TDM data rate Up to 32 upstream and 32 downstream channels PDM interface Programmable PDM clock rate Up to 4 high dynamic range microphone inputs Simultaneous reception of I2S data with up to 4 PDM microphones Unique ID register for each transceiver Crossover or straight-through cabling Programmable settings to optimize EMC performance

A2B Main/Subordinate 4xPDM XCVR w I2S/TDM Features:A2B BUS FEATURES Line topology Single main node, multiple subordinate nodes Up to 15 m between nodes and up to 40 m overall cable length Communication over distance Synchronous data Multichannel I2S/TDM to I2S/TDM Synchronous clock, phase aligned in all nodes Low latency node to node communication Control and status information I2C to I2C GPIO and interrupt Bus power or local power subordinate nodes Configurable with SigmaStudio/SigmaStudio+ graphical software tool AEC-Q100 qualified for automotive applicationsA2B TRANSCEIVER FEATURES Configurable A2B bus main node or subordinate node Programmable via I2C interface 8-bit to 32-bit multichannel I2S/TDM interface Programmable I2S/TDM data rate Up to 32 upstream and 32 downstream channels PDM interface Programmable PDM clock rate Up to 4 high dynamic range microphone inputs Simultaneous reception of I2S data with up to 4 PDM microphones Unique ID register for each transceiver Crossover or straight-through cabling Programmable settings to optimize EMC performance

SigmaDSP Digital Audio Processor Features: Qualified for automotive applications Fully programmable audio DSP for enhanced sound processing Features SigmaStudio, a proprietary graphical programming tool for the development of custom signal flows Clock oscillator for generating master clock from crystal Up to 294.912 MHz, 32-bit SigmaDSP core at 1.2 V Up to 6144 SIMD instructions per sample at 48 kHz Up to 40 kWords of parameter/data RAM Up to 800 ms digital audio delay pool at 48 kHz Audio input/output and routing 4 serial input ports, 4 serial output ports 48-channel, 32-bit digital input/output up to a sample rate of 192 kHz Flexible configuration for TDM, I2S, left and right justified formats, and PCM Up to 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and 139 dB DNR Stereo S/PDIF input and output Four PDM microphone input channels Multichannel, byte addressable, TDM serial ports Integer PLL and flexible clock generators Integrated die temperature sensor

8 Channel, 12-Bit, Configurable ADC/DAC with on-chip Reference, SPI interface Features: Download AD5592R-1-KGD Data Sheet. Available as Known Good Die and fully guaranteed to data sheet specifications. 8-channel, configurable ADC/DAC/GPIO Configurable as any combination of 8 × 12-bit DAC channels 8 × 12-bit ADC channels 8 × general-purpose digital input/output pins Integrated temperature sensor SPI interface Available in 16-ball, 2 mm × 2 mm WLCSP 16-lead, 3 mm × 3 mm LFCSP 16-lead TSSOP