DEV KIT, MEASUREMENT AND ANALYSIS;

This device is a member of the ADSP-BF70x Blackfin Digital Signal Processor (DSP) product family. The new Blackfin+ processor core combines dual-MAC 16-bit, 32-bit MAC and 16-bit complex MAC in to a state-of-the-art signal processing engine. It also combines advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities within a single instruction-set architecture. Further new enhancements to the Blackfin+ core add cache enhancements, branch prediction and other instruction set improvements—all while maintaining instruction set compatibility to previous Blackfin products.The processor offers performance up to 400 MHz, as well as lowest power consumption at <100mW. Produced with a low-power and low-voltage design methodology, they provide world-class power management and performance.By integrating a rich set of industry-leading system peripherals and large on-chip memory, this Blackfin processor is the platform of choice for next-generation applications that require RISC-like programmability, multimedia support, and leading-edge signal processing in one integrated package. These applications span a wide array of markets, from automotive systems to embedded industrial, instrumentation, video/image analysis, biometric and control applications.

This device is a member of the ADSP-BF70x Blackfin Digital Signal Processor (DSP) product family. The new Blackfin+ processor core combines dual-MAC 16-bit, 32-bit MAC and 16-bit complex MAC in to a state-of-the-art signal processing engine. It also combines advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities within a single instruction-set architecture. Further new enhancements to the Blackfin+ core add cache enhancements, branch prediction and other instruction set improvements—all while maintaining instruction set compatibility to previous Blackfin products.The processor offers performance up to 400 MHz, as well as lowest power consumption at By integrating a rich set of industry-leading system peripherals, large on-chip memory & a high speed external memory interface, this Blackfin processor is the platform of choice for next-generation applications that require RISC-like programmability, multimedia support, and leading-edge signal processing in one integrated package. These applications span a wide array of markets, from automotive systems to embedded industrial, instrumentation, video/image analysis, biometric and control applications.

This device is a member of the ADSP-BF70x Blackfin Digital Signal Processor (DSP) product family. The new Blackfin+ processor core combines dual-MAC 16-bit, 32-bit MAC and 16-bit complex MAC in to a state-of-the-art signal processing engine. It also combines advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD) multimedia capabilities within a single instruction-set architecture. Further new enhancements to the Blackfin+ core add cache enhancements, branch prediction and other instruction set improvements—all while maintaining instruction set compatibility to previous Blackfin products.The processor offers performance up to 400 MHz, as well as lowest power consumption at By integrating a rich set of industry-leading system peripherals, large on-chip memory & a high speed external memory interface, this Blackfin processor is the platform of choice for next-generation applications that require RISC-like programmability, multimedia support, and leading-edge signal processing in one integrated package. These applications span a wide array of markets, from automotive systems to embedded industrial, instrumentation, video/image analysis, biometric and control applications.

The ADSP-CM409F Mixed-Signal Control Processor integrates dual high precision 16 bit ADCs and an ARM® Cortex-M4TM processor core with floating-point unit operating at 240 MHz core clock frequency and integrating 384KB of SRAM memory, 2M byte of flash memory, and accelerators and peripherals optimized for motor control, photo-voltaic (PV) inverter control and other embedded control applications.

SmartMesh IP wireless sensor networks are self managing, low power internet protocol (IP) networks built from wireless nodes called motes. The LTC5800-IPM is the SmartMesh IP integrated circuit in the Eterna® family of IEEE 802.15.4e System-on-Chip (SoC) solutions, featuring a highly integrated, low power radio design as well as an ARM Cortex-M3 32-bit microprocessor running SmartMesh IP embedded networking software.With SmartMesh IP time-synchronized networks, all motes in the network may route, source or terminate data, while providing many years of battery powered operation. SmartMesh IP is a highly flexible network with proven reliability and low power performance in an easy-to-integrate platform.The LTC5800-IPM’s behavior in a SmartMesh IP network is determined by the choice of SmartMesh IP network software loaded: Wireless Mote, EManager, or Access Point Mote in a SmartMesh IP network. The SmartMesh IP software provided with the LTC5800-IPM is fully tested and validated, and is readily configured via a software Application Programming Interface. Once you have purchased SmartMesh IP products, the SmartMesh IP stack binaries may be downloaded via your myAnalog account.The pin signaling behavior of the LTC5800*WR-IPMA hardware is determined by the software loaded and is described in detail in the following product datasheets: LTC5800-IPM = LTC5800*WR-IPMA hardware + SmartMesh IP  Mote  Software → LTC5800-IPM Datasheet LTC5800-IPR = LTC5800*WR-IPMA hardware + SmartMesh IP EManager Software → LTC5800-IPR Datasheet LTC5800-IPA = LTC5800*WR-IPMA hardware + SmartMesh IP Access Point Software → LTC5800-IPA Datasheet Network Features Feature Benefit >99.999% Network Reliability Avoids communications dropouts common with other wireless networks NIST-certified AES-128 bit Encryption Data protected by end-to-end encryption, message integrity checking and device authentication Scalable Uses time-slotted channel-hopping protocol to avoid in-network collisions to maximize scale while minimizing power and latency-hungry transmission retries due to congestion Bidirectional Communications Ideal for both monitoring and control applications Up to 10 messages/second/node Time-slotted communications avoids contention. This data rate includes built-in margin for packet retries. Device Features Feature Benefit Industry-Leading Low Power Radio Technology • 4.5mA to Receive a Packet • 5.4mA to Transmit at 0dBm • 9.7mA to Transmit at 8dBm Pre-engineered RF RF elements include an on-chip power amplifier and are pre-tuned for optimized performance, including temperature compensation, saving development time. Energy Harvesting Support Very low power design enables motes to be powered by a wide variety of energy harvesters. Click here to see a demonstration circuit of a SmartMesh IP mote powered by indoor light. Integrated Temperature Sensor Precise temperature sensor is integrated directly into the mote. ApplicationsSmartMesh IP is ideally suited for wireless Industrial Internet of Things (IoT) applications. Learn more about SmartMesh applications. 

The ADSP-BF609 Blackfin processor is optimized for embedded vision and video analytics applications using a dual-core fixed-point DSP processor with a unique pipelined vision processor (PVP). The PVP is a set of functional blocks next to the Blackfin cores designed to accelerate image processing algorithms and reduce overall bandwidth requirements.Other features include a high performance enhanced infrastructure, large on-chip memory and a feature rich peripheral set with expanded connectivity options.In addition to these the ADSP-BF609 processor contains features for safety-critical applications, including a CRC for memory protection, Parity and ECC protection in the internal memory blocks and a Fault Management Unit.The ADSP-BF609 processor is ideal for many embedded vision applications such as automotive advanced driver assistance systems (ADAS), machine vision and robotics for industrial manufacturing systems, security and surveillance system analytics and bar code scanners.

The ADSP-2136x SHARC® processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices, Inc., Super Harvard Architecture. The processor is source code-compatible with the ADSP-2126x and ADSP-2116x DSPs, as well as with first generation ADSP-2106x SHARC processors in SISD (single-instruction, single-data) mode. The ADSP-2136x are 32-/40-bit floating-point processors optimized for high performance automotive audio applications. They contain a large on-chip SRAM and ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital audio interface (DAI).As shown in the functional block diagram on Page 1, the ADSP-2136x uses two computational units to deliver a significant performance increase over the previous SHARC processors on a range of signal processing algorithms. With its SIMD computational hardware, the ADSP-2136x can perform two GFLOPS running at 333 MHz. 

The ADSP-2136x SHARC® processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices, Inc., Super Harvard Architecture. The processor is source code-compatible with the ADSP-2126x and ADSP-2116x DSPs, as well as with first generation ADSP-2106x SHARC processors in SISD (single-instruction, single-data) mode. The ADSP-2136x are 32-/40-bit floating-point processors optimized for high performance automotive audio applications. They contain a large on-chip SRAM and ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital audio interface (DAI).As shown in the functional block diagram on Page 1, the ADSP-2136x uses two computational units to deliver a significant performance increase over the previous SHARC processors on a range of signal processing algorithms. With its SIMD computational hardware, the ADSP-2136x can perform two GFLOPS running at 333 MHz. 

The ADSP-2136x SHARC® processor is a member of the SIMD SHARC family of DSPs that feature Analog Devices, Inc., Super Harvard Architecture. The processor is source code-compatible with the ADSP-2126x and ADSP-2116x DSPs, as well as with first generation ADSP-2106x SHARC processors in SISD (single-instruction, single-data) mode. The ADSP-2136x are 32-/40-bit floating-point processors optimized for high performance automotive audio applications. They contain a large on-chip SRAM and ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital audio interface (DAI).As shown in the functional block diagram on Page 1, the ADSP-2136x uses two computational units to deliver a significant performance increase over the previous SHARC processors on a range of signal processing algorithms. With its SIMD computational hardware, the ADSP-2136x can perform two GFLOPS running at 333 MHz.