The ADP7182 is a CMOS, low dropout (LDO) linear regulator that operates from −2.7 V to −28 V and provides up to −200 mA of output current. This high input voltage LDO is ideal for regulation of high performance analog and mixed signal circuits operating from −27 V down to −1.2 V rails. Using an advanced proprietary architecture, it provides high power supply rejection and low noise, and achieves excellent line and load transient response with a small 2.2 μF ceramic output capacitor.The ADP7182 is available in fixed output voltage and an adjustable version that allows the output voltage to range from −1.22 V to −VIN + VDO via an external feedback divider.The following fixed output voltages are available from stock: −5 V (3 mm × 3 mm LFCSP), −1.8 V, −2.5 V, −3 V, −5 V (TSOT), −1.2 V, −1.5 V, −2.5 V, −5 V (2.00 mm × 2.00 mm LFCSP). Additional voltages are available by special order.The ADP7182 regulator output noise is 18 μV rms independent of the output voltage. The enable logic is capable of interfacing with positive or negative logic levels for maximum flexibility. The ADP7182 is available in 5-lead TSOT, 6- and 8-lead LFCSP packages for a small, low profile footprint.Applications Regulation to noise sensitive applications Analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuits, precision amplifiers Communications and infrastructure Medical and healthcare Industrial and instrumentation

The MAX696/MAX697 supervisory circuits reduce the complexity and number of components required for power-supply monitoring and battery-control functions in microprocessor (µP) systems. These include µP reset and backup-battery switchover, watchdog timer, CMOS RAM write protection, and power-failure warning. The MAX696/MAX697 significantly improve system reliability and accuracy compared to that obtained with separate ICs or discrete components.The MAX696 and MAX697 are supplied in 16-pin packages and perform six functions:A reset output during power-up, power-down, and brownout conditions. The threshold for this 'lowline' reset is adjustable by an external voltage-divider.A reset pulse if the optional watchdog timer has not been toggled within a specified time.Individual outputs for low-line and watchdog fault conditions.The reset time may be left at its default value of 50ms, or may be varied with an external capacitor or clock pulses.A separate 1.3V threshold detector for power-fail warning, low-battery detection, or to monitor a power supply other than VCC.The MAX696 also has battery-backup switching for CMOS RAM, CMOS microprocessor, or other low-power logic.The MAX697 lacks battery-backup switching, but has write-protection pins (active-low CE IN and active-low CE OUT) for CMOS RAM or EPROM. In addition, it consumes less than 250 microamperes.ApplicationsComputersControllersCritical µP Power MonitoringIntelligent Instruments

The ADMC401 is a single-chip DSP-based controller, suitable for high performance control of ac induction motors (ACIM), permanent magnet synchronous motors (PMSM), brushless dc motors (BDCM) and switched reluctance (SR) motors in industrial applications. The ADMC401 integrates a 26 MIPS, fixed-point DSP core with a complete set of motor control peripherals that permits fast motor control in a highly integrated environment.The DSP core of the ADMC401 is the ADSP-2171 which is completely code compatible with the ADSP-21xx DSP family (as well as other members of the integrated motor controllers of the ADMC3xx family) and combines three computational units, data address generators and a program sequencer. The computational units comprise an ALU, a multiplier/accumulator (MAC) and a barrel shifter. The DSP core also adds instructions for bit manipulation, squaring (x2), biased rounding and global interrupt masking. In addition, two flexible double-buffered, bidirectional synchronous serial ports are included in the ADMC401.The ADMC401 provides 2K × 24-bit internal program memory RAM, 2K × 24-bit internal program memory ROM and 1K × 16-bit internal data memory RAM. The program and data memory RAM can be boot loaded through the serial port from either a serial E2PROM, through a UART connection (either from external host microprocessor or from the Motion Control Debugger) or via a synchronous serial interface from a host microprocessor. Alternatively, the internal program and data memory RAM may be booted from an external device across the address and data buses. The program memory ROM includes a monitor that adds software debugging features through the serial port.Additionally, the ADMC401 device adds significant external memory and peripheral expansion capabilities by making available the full address and data bus of the DSP core. This feature permits expansion of both external program and data memory and means that the DSP core can address up to 14K × 24 bits of external program memory and up to 13K × 16 bits of external data memory.The ADMC401 contains a number of special purpose, motor control peripherals. The first is a high performance, 8-channel, 12-bit ADC system with dual channel simultaneous sampling ability across 4 pair of inputs. An internal precision voltage reference is also available as part of the ADC system. In addition, a three-phase, 16-bit, center-based PWM generation unit can be used to produce high-accuracy PWM signals with minimal processor overhead. The ADMC401 also contains a flexible incremental encoder interface unit for position sensor feedback; two adjustable-frequency auxiliary PWM outputs, 12 lines of digital I/O; a 2-channel event capture system; a 16-bit watchdog timer; two 16-bit interval timers (one of which can be linked to the encoder interface unit) and an interrupt controller that manages all peripheral interrupts. Finally, the ADMC401 contains an integrated power-on-reset (POR) circuit that can be used to generate the required reset signal for the device on power-on.

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